| /linux-6.15/arch/arc/lib/ |
| H A D | strchr-700.S | 41 breq r7,0,.Loop ; For speed, we want this branch to be unaligned.
45 breq r12,0,.Loop ; For speed, we want this branch to be unaligned.
57 .Loop: label
67 breq r7,0,.Loop /* ... so that this branch is unaligned. */
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| H A D | strlen.S | 43 .Loop: label
53 breq r12,0,.Loop
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| /linux-6.15/drivers/iio/frequency/ |
| H A D | Kconfig | 6 # Phase-Locked Loop (PLL) frequency synthesizers
27 # Phase-Locked Loop (PLL) frequency synthesizers
30 menu "Phase-Locked Loop (PLL) frequency synthesizers"
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| /linux-6.15/arch/xtensa/lib/ |
| H A D | strnlen_user.S | 71 .Loop: label
79 blt a4, a10, .Loop
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| /linux-6.15/net/batman-adv/ |
| H A D | Kconfig | 35 bool "Bridge Loop Avoidance"
40 This option enables BLA (Bridge Loop Avoidance), a mechanism
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| /linux-6.15/include/sound/ |
| H A D | wavefront.h | 380 u8 Loop:1; member
404 u8 Loop:1; member
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| /linux-6.15/fs/affs/ |
| H A D | Kconfig | 20 If you want to do this, you will also need to say Y or M to "Loop
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| /linux-6.15/Documentation/hwmon/ |
| H A D | mp2993.rst | 23 MP2993 Dual Loop Digital Multi-phase Controller.
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| /linux-6.15/tools/power/pm-graph/config/ |
| H A D | example.cfg | 101 # Call Loop Max Gap (dev mode only)
105 # Call Loop Max Length (dev mode only)
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| /linux-6.15/Documentation/networking/ |
| H A D | napi.rst | 413 Loop 2 can take control from Loop 1, if ``gro_flush_timeout`` and
419 During busy periods, ``irq-suspend-timeout`` is used as timer in Loop 2,
420 which essentially tilts network processing in favour of Loop 3.
422 If ``gro_flush_timeout`` and ``napi_defer_hard_irqs`` are not set, Loop 3
423 cannot take control from Loop 1.
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| /linux-6.15/Documentation/trace/coresight/ |
| H A D | coresight-perf.rst | 97 CoreSight / ASM Pure Loop
99 CoreSight / Thread Loop 10 Threads - Check TID
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| /linux-6.15/drivers/hwmon/pmbus/ |
| H A D | Kconfig | 344 MP2856 MP2857 Dual Loop Digital Multi-Phase Controller.
362 MP2891 Dual Loop Digital Multi-Phase Controller.
371 MP2975 Dual Loop Digital Multi-Phase Controller.
380 MP2993 Dual Loop Digital Multi-Phase Controller.
390 Dual Loop Digital Multi-Phase Controller.
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| /linux-6.15/Documentation/ABI/testing/ |
| H A D | debugfs-driver-dcc | 95 iv) Loop instruction
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| /linux-6.15/Documentation/userspace-api/media/v4l/ |
| H A D | ext-ctrls-codec-stateless.rst | 1178 - See :ref:`Loop Filter Flags <vp8_loop_filter_flags>`
1182 ``Loop Filter Flags``
1923 - Loop filter segment feature.
2026 See :ref:`Loop Filter Flags <vp9_loop_filter_flags>`.
2034 ``Loop Filter Flags``
3300 AV1 Loop Restoration as described in section 6.10.15 "Loop restoration params
3334 ``AV1 Loop Restoration Flags``
3490 AV1 Loop filter params as defined in section 6.8.10 "Loop filter semantics" of
3535 ``AV1 Loop Filter Flags``
3821 - Loop filter params
[all …]
|
| H A D | ext-ctrls-codec.rst | 1099 Loop filter mode for H264 encoder. Possible values are:
1112 - Loop filter is enabled.
1114 - Loop filter is disabled.
1116 - Loop filter is disabled at the slice boundary.
1124 Loop filter alpha coefficient, defined in the H264 standard.
1131 Loop filter beta coefficient, defined in the H264 standard.
2503 Loop filter mode for HEVC encoder. Possible values are:
2516 - Loop filter is disabled.
2518 - Loop filter is enabled.
2520 - Loop filter is disabled at the slice boundary.
|
| /linux-6.15/Documentation/hid/ |
| H A D | amd-sfh-hid.rst | 96 | | | Loop(for No of Sensors) | |
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| /linux-6.15/Documentation/sound/cards/ |
| H A D | cmipci.rst | 165 IEC958 Loop
201 "IEC958 Loop". The switches are resumed after closing the SPDIF PCM
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| /linux-6.15/arch/x86/crypto/ |
| H A D | sm3-avx-asm_64.S | 366 .Loop: label
497 jne .Loop;
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| /linux-6.15/arch/powerpc/crypto/ |
| H A D | aes-gcm-p10.S | 759 # Loop 8x blocks and compute ghash
1037 # Loop 8x blocks and compute ghash
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| /linux-6.15/arch/arm64/crypto/ |
| H A D | sm3-neon-core.S | 399 .Loop: label
525 b .Loop
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| /linux-6.15/arch/arm/crypto/ |
| H A D | sha1-armv7-neon.S | 326 .Loop: label
596 b .Loop;
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| /linux-6.15/drivers/scsi/aic7xxx/ |
| H A D | aic79xx.reg | 2747 * 960MHz Phase-Locked Loop Control 0
2774 * 960MHz Phase-Locked Loop Control 1
2815 * 960-MHz Phase-Locked Loop Test Count
2825 * 400-MHz Phase-Locked Loop Control 0
2851 * 400-MHz Phase-Locked Loop Control 1
2873 * 400-MHz Phase-Locked Loop Test Count
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| /linux-6.15/Documentation/driver-api/ |
| H A D | dpll.rst | 10 PLL - Phase Locked Loop is an electronic circuit which syntonizes clock
14 DPLL - Digital Phase Locked Loop is an integrated circuit which in
|
| /linux-6.15/Documentation/networking/device_drivers/ethernet/cirrus/ |
| H A D | cs89x0.rst | 442 * Internal Loop-back Test
444 The Internal Loop Back test insures the adapter's transmitter and
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| /linux-6.15/Documentation/arch/powerpc/ |
| H A D | papr_hcalls.rst | 84 | CTR | Y | Loop Counter |
|