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Searched refs:LPDDR2 (Results 1 – 12 of 12) sorted by relevance

/linux-6.15/drivers/mtd/lpddr/
H A DKconfig2 menu "LPDDR & LPDDR2 PCM memory drivers"
25 tristate "Support for LPDDR2-NVM flash chips"
27 This option enables support of PCM memories with a LPDDR2-NVM
/linux-6.15/Documentation/driver-api/memory-devices/
H A Dti-emif.rst30 supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
31 This driver takes care of only LPDDR2 memories presently. The
63 - mr4 : last polled value of MR4 register in the LPDDR2 device. MR4
/linux-6.15/drivers/cpufreq/
H A Ds5pv210-cpufreq.c115 LPDDR2 = 0x2, enumerator
530 if ((mem_type != LPDDR) && (mem_type != LPDDR2)) { in s5pv210_cpu_init()
/linux-6.15/arch/arm/boot/dts/nvidia/
H A Dtegra30-asus-tf201.dts113 /* Elpida 1GB EDB8132B2MA-8D-F LPDDR2 400MHz */
168 /* TF201 Unknown 1GB LPDDR2 500MHZ */
225 /* Elpida 1GB EDB8132B2MA-8D-F LPDDR2 400MHz */
405 /* TF201 Unknown 1GB LPDDR2 500MHZ */
H A Dtegra30-lg-p895.dts117 /* Hynix 1GB H9TCNNN8JDMMPR LPDDR2 533MHz */
194 /* Hynix 1GB H9TCNNN8JDMMPR LPDDR2 533MHz */
/linux-6.15/Documentation/devicetree/bindings/memory-controllers/ddr/
H A Djedec,lpddr2-timings.yaml7 title: LPDDR2 SDRAM AC timing parameters for a given speed-bin
H A Djedec,lpddr2.yaml7 title: LPDDR2 SDRAM compliant to JEDEC JESD209-2
/linux-6.15/Documentation/devicetree/bindings/memory-controllers/
H A Dnvidia,tegra30-mc.yaml34 and arbitrates among them to allocate memory bandwidth for DDR3L and LPDDR2
H A Dnvidia,tegra20-emc.yaml19 standard protocols: DDR1, LPDDR2 and DDR2.
H A Dnvidia,tegra30-emc.yaml18 settings. Tegra30 EMC supports multiple JEDEC standard protocols: LPDDR2,
/linux-6.15/Documentation/devicetree/bindings/memory-controllers/ti/
H A Demif.txt5 DDR2/DDR3/LPDDR2 protocols. This binding describes a given instance
/linux-6.15/drivers/memory/
H A DKconfig97 supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
98 This driver takes care of only LPDDR2 memories presently. The