Searched refs:KVM_REG_RISCV_FP_D (Results 1 – 4 of 4) sorted by relevance
398 __u64 reg_off = id & ~(REG_MASK | KVM_REG_RISCV_FP_D); in fp_d_id_to_str()400 assert((id & KVM_REG_RISCV_TYPE_MASK) == KVM_REG_RISCV_FP_D); in fp_d_id_to_str()669 case KVM_REG_RISCV_FP_D: in print_reg()841 KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_FP_D | KVM_REG_RISCV_FP_D_REG(f[0]),842 KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_FP_D | KVM_REG_RISCV_FP_D_REG(f[1]),843 KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_FP_D | KVM_REG_RISCV_FP_D_REG(f[2]),844 KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_FP_D | KVM_REG_RISCV_FP_D_REG(f[3]),845 KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_FP_D | KVM_REG_RISCV_FP_D_REG(f[4]),846 KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_FP_D | KVM_REG_RISCV_FP_D_REG(f[5]),847 KVM_REG_RISCV | KVM_REG_SIZE_U64 | KVM_REG_RISCV_FP_D | KVM_REG_RISCV_FP_D_REG(f[6]),[all …]
100 } else if ((rtype == KVM_REG_RISCV_FP_D) && in kvm_riscv_vcpu_get_reg_fp()145 } else if ((rtype == KVM_REG_RISCV_FP_D) && in kvm_riscv_vcpu_set_reg_fp()
989 KVM_REG_RISCV_FP_D | i; in copy_fp_d_reg_indices()999 reg = KVM_REG_RISCV | KVM_REG_SIZE_U32 | KVM_REG_RISCV_FP_D | i; in copy_fp_d_reg_indices()1251 case KVM_REG_RISCV_FP_D: in kvm_riscv_vcpu_set_reg()1253 KVM_REG_RISCV_FP_D); in kvm_riscv_vcpu_set_reg()1284 case KVM_REG_RISCV_FP_D: in kvm_riscv_vcpu_get_reg()1286 KVM_REG_RISCV_FP_D); in kvm_riscv_vcpu_get_reg()
259 #define KVM_REG_RISCV_FP_D (0x06 << KVM_REG_RISCV_TYPE_SHIFT) macro