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Searched refs:IS_VALLEYVIEW (Results 1 – 25 of 39) sorted by relevance

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/linux-6.15/drivers/gpu/drm/i915/
H A Dvlv_sideband.c45 if (IS_VALLEYVIEW(i915)) { in __vlv_punit_get()
53 if (IS_VALLEYVIEW(i915)) in __vlv_punit_put()
255 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in vlv_iosf_sb_init()
258 if (IS_VALLEYVIEW(i915)) in vlv_iosf_sb_init()
264 if (IS_VALLEYVIEW(i915)) in vlv_iosf_sb_fini()
267 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in vlv_iosf_sb_fini()
H A Dvlv_suspend.c387 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) in vlv_suspend_complete()
432 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) in vlv_resume_prepare()
462 if (!IS_VALLEYVIEW(i915)) in vlv_suspend_init()
H A Di915_irq.c1173 else if (IS_VALLEYVIEW(dev_priv)) in intel_irq_handler()
1196 else if (IS_VALLEYVIEW(dev_priv)) in intel_irq_reset()
1219 else if (IS_VALLEYVIEW(dev_priv)) in intel_irq_postinstall()
H A Dintel_uncore.c410 if (IS_VALLEYVIEW(uncore->i915)) in __gen6_gt_wait_for_fifo()
2217 } else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { in intel_uncore_fw_domains_init()
2456 } else if (IS_VALLEYVIEW(i915)) { in uncore_forcewake_init()
2540 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in intel_uncore_init_mmio()
H A Di915_driver.c1577 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) in intel_runtime_suspend()
1635 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) { in intel_runtime_resume()
/linux-6.15/drivers/gpu/drm/i915/display/
H A Dintel_pipe_crc.c415 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in get_new_crc_ctl_reg()
545 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_is_valid_crc_source()
622 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_crtc_set_crc_source()
H A Dintel_sprite_uapi.c64 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_sprite_set_colorkey_ioctl()
H A Dintel_hotplug_irq.c139 if (IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || in intel_hpd_init_pins()
422 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i9xx_hpd_irq_ack()
464 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i9xx_hpd_irq_handler()
479 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in i9xx_hpd_irq_handler()
1460 if ((IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) && in intel_hpd_irq_setup()
H A Dintel_dsi_vbt.c426 else if (IS_VALLEYVIEW(i915)) in mipi_exec_gpio()
914 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_dsi_vbt_gpio_init()
920 if (IS_VALLEYVIEW(dev_priv) && mipi_config->pwm_blc == PPS_BLC_SOC) { in intel_dsi_vbt_gpio_init()
H A Dintel_crt.c373 else if (IS_VALLEYVIEW(dev_priv)) in intel_crt_mode_valid()
597 if (IS_VALLEYVIEW(dev_priv)) in intel_crt_detect_hotplug()
1027 else if (IS_VALLEYVIEW(dev_priv)) in intel_crt_init()
H A Dintel_wm.c193 IS_VALLEYVIEW(dev_priv) || in wm_latency_show()
H A Dvlv_dsi.c765 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_dsi_pre_enable()
974 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_dsi_get_hw_state()
1330 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_dsi_prepare()
1773 if (IS_VALLEYVIEW(dev_priv)) in vlv_dsi_min_cdclk()
H A Dintel_crtc_state_dump.c370 else if (IS_VALLEYVIEW(i915)) in intel_crtc_state_dump()
H A Dintel_dpll.c410 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) { in i9xx_dpll_get_hw_state()
594 !IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv) && in intel_pll_is_valid()
599 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv) && in intel_pll_is_valid()
1817 else if (IS_VALLEYVIEW(dev_priv)) in intel_dpll_init_clock_hook()
/linux-6.15/drivers/gpu/drm/i915/selftests/
H A Dintel_uncore.c174 if (IS_VALLEYVIEW(gt->i915) || IS_CHERRYVIEW(gt->i915)) { in live_forcewake_ops()
285 !IS_VALLEYVIEW(gt->i915) && in live_forcewake_domains()
/linux-6.15/drivers/gpu/drm/i915/gt/
H A Dintel_rc6.c607 else if (IS_VALLEYVIEW(i915)) in intel_rc6_init()
645 else if (IS_VALLEYVIEW(i915)) in intel_rc6_enable()
803 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { in intel_rc6_residency_ns()
H A Dselftest_rc6.c55 if (IS_VALLEYVIEW(gt->i915) || IS_CHERRYVIEW(gt->i915)) in live_rc6_manual()
H A Dintel_rps.c706 if (IS_VALLEYVIEW(gt->i915)) in rps_set_power()
843 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in rps_set()
1559 else if (IS_VALLEYVIEW(i915)) in intel_rps_enable()
1659 else if (IS_VALLEYVIEW(i915)) in intel_gpu_freq()
1676 else if (IS_VALLEYVIEW(i915)) in intel_freq_opcode()
2007 else if (IS_VALLEYVIEW(i915)) in intel_rps_init()
2094 else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in intel_rps_get_cagf()
2123 } else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { in __read_cagf()
H A Dintel_gt_pm_debugfs.c327 else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in drpc_show()
358 } else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { in intel_gt_pm_frequency_dump()
H A Dintel_ggtt_fencing.c579 if (GRAPHICS_VER(i915) >= 8 || IS_VALLEYVIEW(i915)) { in detect_bit_6_swizzle()
854 !(IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))) in intel_ggtt_init_fences()
H A Dgen7_renderclear.c403 IS_VALLEYVIEW(i915)) ? in emit_batch()
H A Dintel_gt_sysfs_pm.c306 if (IS_VALLEYVIEW(gt->i915) || IS_CHERRYVIEW(gt->i915)) { in intel_sysfs_rc6_init()
871 if (IS_VALLEYVIEW(gt->i915) || IS_CHERRYVIEW(gt->i915)) in intel_sysfs_rps_init()
/linux-6.15/drivers/gpu/drm/xe/compat-i915-headers/
H A Di915_drv.h47 #define IS_VALLEYVIEW(dev_priv) (dev_priv && 0) macro
/linux-6.15/drivers/gpu/drm/i915/soc/
H A Dintel_gmch.c89 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in intel_gmch_bar_setup()
H A Dintel_dram.c135 else if (IS_VALLEYVIEW(i915)) in detect_mem_freq()

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