| /linux-6.15/drivers/gpu/drm/i915/gt/ |
| H A D | intel_workarounds.c | 925 else if (IS_DG2(i915)) in __intel_engine_init_ctx_wa()
1389 if (IS_DG2(gt->i915)) in xehp_init_mcr()
1669 else if (IS_DG2(i915)) in gt_init_workarounds()
2114 else if (IS_DG2(i915)) in intel_engine_init_whitelist()
2222 IS_DG2(i915)) { in rcs_engine_wa_init()
2229 IS_DG2(i915)) { in rcs_engine_wa_init()
2235 if (IS_DG2(i915)) { in rcs_engine_wa_init()
2245 IS_DG2(i915)) { in rcs_engine_wa_init()
2828 IS_DG2(i915)) { in general_render_compute_wa_init()
2839 IS_DG2(i915)) { in general_render_compute_wa_init()
[all …]
|
| H A D | intel_gt_ccs_mode.c | 17 if (!IS_DG2(gt->i915)) in intel_gt_apply_ccs_mode()
|
| H A D | intel_gt_mcr.c | 154 } else if (IS_DG2(i915)) { in intel_gt_mcr_init()
618 *group = IS_DG2(gt->i915) ? 1 : 0; in get_nonterminated_steering()
|
| H A D | gen8_engine_cs.c | 227 IS_DG2(rq->i915)) { in mtl_dummy_pipe_control()
828 if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74)) || IS_DG2(i915)) in gen12_emit_fini_breadcrumb_rcs()
|
| H A D | intel_gsc.c | 178 } else if (IS_DG2(i915)) { in gsc_init_one()
|
| H A D | intel_mocs.c | 467 } else if (IS_DG2(i915)) { in get_mocs_settings()
|
| H A D | intel_reset.c | 649 if (IS_DG2(gt->i915) && engine_mask == ALL_ENGINES) in gen8_reset_engines()
|
| H A D | intel_lrc.c | 1370 IS_DG2(ce->engine->i915)) in gen12_emit_indirect_ctx_rcs()
|
| H A D | intel_engine_cs.c | 886 if (IS_DG2(gt->i915)) { in init_engine_mask()
|
| /linux-6.15/drivers/gpu/drm/xe/compat-i915-headers/ |
| H A D | i915_drv.h | 66 #define IS_DG2(dev_priv) IS_PLATFORM(dev_priv, XE_DG2) macro
|
| /linux-6.15/drivers/gpu/drm/i915/gt/uc/ |
| H A D | intel_huc.c | 309 if (IS_DG2(i915)) { in intel_huc_init_early()
362 if (IS_DG2(gt->i915)) { in check_huc_loading_mode()
|
| H A D | intel_guc.c | 302 IS_DG2(gt->i915)) in guc_ctl_wa_flags()
317 if (IS_DG2(gt->i915)) in guc_ctl_wa_flags()
|
| H A D | intel_guc_ads.c | 863 IS_DG2(gt->i915))) in guc_waklv_init()
|
| /linux-6.15/drivers/gpu/drm/i915/ |
| H A D | i915_hwmon.c | 303 if (IS_DG1(i915) || IS_DG2(i915)) in hwm_pcode_read_i1()
354 return IS_DG1(i915) || IS_DG2(i915) ? 0444 : 0; in hwm_in_is_visible()
850 if (IS_DG1(i915) || IS_DG2(i915)) { in hwm_get_preregistration_info()
|
| H A D | intel_clock_gating.c | 748 if (IS_DG2(i915)) in intel_clock_gating_hooks_init()
|
| H A D | i915_drv.h | 527 #define IS_DG2(i915) IS_PLATFORM(i915, INTEL_DG2) macro
|
| H A D | i915_perf.c | 2870 if (IS_DG2(i915)) { in gen12_enable_metric_set()
2949 if (IS_DG2(i915)) { in gen12_disable_metric_set()
3197 if (IS_DG2(i915) || IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74))) { in i915_perf_oa_timestamp_frequency()
|
| H A D | i915_driver.c | 433 if (IS_DG2(i915)) { in i915_enable_g8()
|
| /linux-6.15/drivers/gpu/drm/i915/soc/ |
| H A D | intel_pch.c | 261 } else if (IS_DG2(dev_priv)) { in intel_detect_pch()
|
| H A D | intel_dram.c | 714 if (GRAPHICS_VER(i915) < 9 || IS_DG2(i915) || !HAS_DISPLAY(i915)) in intel_dram_detect()
|
| /linux-6.15/drivers/gpu/drm/i915/display/ |
| H A D | intel_dmc.c | 186 } else if (IS_DG2(i915)) { in dmc_firmware_default()
|
| H A D | intel_bw.c | 762 else if (IS_DG2(dev_priv)) in intel_bw_init_hw()
|
| H A D | skl_watermark.c | 1373 if (IS_DG2(i915)) in skl_compute_dbuf_slices()
3338 int mult = IS_DG2(i915) ? 2 : 1; in skl_read_wm_latency()
|
| H A D | intel_ddi.c | 5226 } else if (IS_DG2(dev_priv)) { in intel_ddi_init()
5288 } else if (IS_DG2(dev_priv)) { in intel_ddi_init()
|
| H A D | intel_dpll.c | 1809 else if (IS_DG2(dev_priv)) in intel_dpll_init_clock_hook()
|