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Searched refs:IS_CHERRYVIEW (Results 1 – 25 of 41) sorted by relevance

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/linux-6.15/drivers/gpu/drm/i915/
H A Dvlv_sideband.c206 if (IS_CHERRYVIEW(i915)) in vlv_dpio_phy_iosf_port()
255 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in vlv_iosf_sb_init()
267 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in vlv_iosf_sb_fini()
H A Dvlv_suspend.c387 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) in vlv_suspend_complete()
432 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) in vlv_resume_prepare()
H A Di915_irq.c1171 if (IS_CHERRYVIEW(dev_priv)) in intel_irq_handler()
1194 if (IS_CHERRYVIEW(dev_priv)) in intel_irq_reset()
1217 if (IS_CHERRYVIEW(dev_priv)) in intel_irq_postinstall()
H A Dintel_uncore.c602 if (IS_CHERRYVIEW(uncore->i915)) { in forcewake_early_sanitize()
2217 } else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { in intel_uncore_fw_domains_init()
2448 } else if (IS_CHERRYVIEW(i915)) { in uncore_forcewake_init()
2540 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in intel_uncore_init_mmio()
/linux-6.15/drivers/gpu/drm/i915/display/
H A Dintel_pipe_crc.c151 if (!IS_CHERRYVIEW(dev_priv)) in vlv_pipe_crc_ctl_reg()
415 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in get_new_crc_ctl_reg()
545 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_is_valid_crc_source()
622 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_crtc_set_crc_source()
H A Dintel_sprite_uapi.c64 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_sprite_set_colorkey_ioctl()
H A Dintel_crtc_state_dump.c346 if (IS_CHERRYVIEW(i915)) in intel_crtc_state_dump()
368 else if (IS_CHERRYVIEW(i915)) in intel_crtc_state_dump()
H A Dintel_hotplug_irq.c140 IS_CHERRYVIEW(dev_priv)) in intel_hpd_init_pins()
422 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i9xx_hpd_irq_ack()
464 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i9xx_hpd_irq_handler()
479 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in i9xx_hpd_irq_handler()
1460 if ((IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) && in intel_hpd_irq_setup()
H A Dintel_dpll.c399 if (IS_CHERRYVIEW(dev_priv) && crtc->pipe != PIPE_A) in i9xx_dpll_get_hw_state()
410 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) { in i9xx_dpll_get_hw_state()
594 !IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv) && in intel_pll_is_valid()
599 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv) && in intel_pll_is_valid()
830 if (IS_CHERRYVIEW(to_i915(dev))) { in vlv_PLL_is_optimal()
1815 else if (IS_CHERRYVIEW(dev_priv)) in intel_dpll_init_clock_hook()
2241 if (IS_CHERRYVIEW(dev_priv)) { in vlv_force_pll_on()
2327 if (IS_CHERRYVIEW(dev_priv)) in vlv_force_pll_off()
H A Dvlv_dsi_pll.c75 if (IS_CHERRYVIEW(dev_priv)) { in dsi_calc_mnp()
125 int refclk = IS_CHERRYVIEW(dev_priv) ? 100000 : 25000; in vlv_dsi_pclk()
H A Dintel_wm.c194 IS_CHERRYVIEW(dev_priv) || in wm_latency_show()
H A Dintel_dsi_vbt.c428 else if (IS_CHERRYVIEW(i915)) in mipi_exec_gpio()
914 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_dsi_vbt_gpio_init()
H A Dintel_hdmi.c991 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_hdmi_set_gcp_infoframe()
1017 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_hdmi_read_gcp_infoframe()
1901 if (IS_CHERRYVIEW(dev_priv) && clock > 216000 && clock < 240000) in hdmi_port_clock_valid()
2915 else if (IS_CHERRYVIEW(dev_priv)) in intel_hdmi_default_ddc_pin()
2992 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_infoframe_init()
H A Dintel_display_irq.c535 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in i9xx_pipestat_irq_ack()
1899 if (IS_CHERRYVIEW(dev_priv)) in _vlv_display_irq_reset()
1950 if (IS_CHERRYVIEW(dev_priv)) in vlv_display_irq_postinstall()
1975 if (IS_CHERRYVIEW(dev_priv)) in vlv_display_irq_postinstall()
H A Dvlv_dsi.c765 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_dsi_pre_enable()
974 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_dsi_get_hw_state()
1330 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_dsi_prepare()
/linux-6.15/drivers/gpu/drm/i915/selftests/
H A Dintel_uncore.c174 if (IS_VALLEYVIEW(gt->i915) || IS_CHERRYVIEW(gt->i915)) { in live_forcewake_ops()
286 !IS_CHERRYVIEW(gt->i915)) in live_forcewake_domains()
/linux-6.15/drivers/gpu/drm/i915/gt/
H A Dintel_gtt.c38 return IS_CHERRYVIEW(i915) || intel_ggtt_update_needs_vtd_wa(i915); in intel_vm_no_concurrent_access_wa()
450 else if (IS_CHERRYVIEW(i915)) in gtt_write_workarounds()
689 else if (IS_CHERRYVIEW(i915) || IS_GEN9_LP(i915)) in setup_private_pat()
H A Dintel_rc6.c605 if (IS_CHERRYVIEW(i915)) in intel_rc6_init()
643 if (IS_CHERRYVIEW(i915)) in intel_rc6_enable()
803 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { in intel_rc6_residency_ns()
H A Dintel_rps.c843 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in rps_set()
1557 else if (IS_CHERRYVIEW(i915)) in intel_rps_enable()
1657 else if (IS_CHERRYVIEW(i915)) in intel_gpu_freq()
1674 else if (IS_CHERRYVIEW(i915)) in intel_freq_opcode()
1861 adj = IS_CHERRYVIEW(gt->i915) ? 2 : 1; in rps_work()
1877 adj = IS_CHERRYVIEW(gt->i915) ? -2 : -1; in rps_work()
2005 if (IS_CHERRYVIEW(i915)) in intel_rps_init()
2094 else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in intel_rps_get_cagf()
2123 } else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { in __read_cagf()
H A Dselftest_rc6.c55 if (IS_VALLEYVIEW(gt->i915) || IS_CHERRYVIEW(gt->i915)) in live_rc6_manual()
H A Dintel_gt_pm_debugfs.c327 else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in drpc_show()
358 } else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { in intel_gt_pm_frequency_dump()
H A Dintel_sseu_debugfs.c255 if (IS_CHERRYVIEW(i915)) in intel_sseu_status()
H A Dintel_gt_sysfs_pm.c306 if (IS_VALLEYVIEW(gt->i915) || IS_CHERRYVIEW(gt->i915)) { in intel_sysfs_rc6_init()
871 if (IS_VALLEYVIEW(gt->i915) || IS_CHERRYVIEW(gt->i915)) in intel_sysfs_rps_init()
/linux-6.15/drivers/gpu/drm/xe/compat-i915-headers/
H A Di915_drv.h48 #define IS_CHERRYVIEW(dev_priv) (dev_priv && 0) macro
/linux-6.15/drivers/gpu/drm/i915/soc/
H A Dintel_gmch.c89 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in intel_gmch_bar_setup()

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