Home
last modified time | relevance | path

Searched refs:IP_VER (Results 1 – 25 of 44) sorted by relevance

12

/linux-6.15/drivers/gpu/drm/i915/gt/
H A Dintel_gt_mcr.c133 } else if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70)) { in intel_gt_mcr_init()
163 GRAPHICS_VER_FULL(i915) < IP_VER(12, 55)) { in intel_gt_mcr_init()
215 if (GRAPHICS_VER_FULL(uncore->i915) >= IP_VER(12, 70)) { in rw_with_mcr_steering_fw()
339 if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70)) { in intel_gt_mcr_lock()
394 if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70)) { in intel_gt_mcr_unlock()
419 if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70)) in intel_gt_mcr_lock_sanitize()
482 if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70)) in intel_gt_mcr_multicast_write()
511 if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70)) in intel_gt_mcr_multicast_write_fw()
775 if (GRAPHICS_VER_FULL(gt->i915) < IP_VER(12, 70)) in intel_gt_mcr_report_steering()
780 if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70)) { in intel_gt_mcr_report_steering()
[all …]
H A Dintel_workarounds.c923 if (IS_GFX_GT_IP_RANGE(engine->gt, IP_VER(12, 70), IP_VER(12, 74))) in __intel_engine_init_ctx_wa()
983 if ((IS_GFX_GT_IP_RANGE(rq->engine->gt, IP_VER(12, 70), IP_VER(12, 74)) || in intel_engine_emit_ctx_wa()
1019 if ((IS_GFX_GT_IP_RANGE(rq->engine->gt, IP_VER(12, 70), IP_VER(12, 74)) || in intel_engine_emit_ctx_wa()
1640 if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74))) { in gt_tuning_settings()
1659 if (MEDIA_VER_FULL(i915) == IP_VER(13, 0)) in gt_init_workarounds()
1667 if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74))) in gt_init_workarounds()
2112 else if (IS_GFX_GT_IP_RANGE(engine->gt, IP_VER(12, 70), IP_VER(12, 74))) in intel_engine_init_whitelist()
2244 if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 71)) || in rcs_engine_wa_init()
2726 if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74)) || IS_DG2(i915)) in add_render_compute_tuning_settings()
2804 IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 74), IP_VER(12, 74))) { in general_render_compute_wa_init()
[all …]
H A Dgen8_engine_cs.c226 if (IS_GFX_GT_IP_RANGE(rq->engine->gt, IP_VER(12, 70), IP_VER(12, 74)) || in mtl_dummy_pipe_control()
268 if (GRAPHICS_VER_FULL(rq->i915) >= IP_VER(12, 70)) in gen12_emit_flush_rcs()
279 GRAPHICS_VER_FULL(rq->i915) < IP_VER(12, 70)) in gen12_emit_flush_rcs()
824 if (GRAPHICS_VER_FULL(rq->i915) < IP_VER(12, 70)) in gen12_emit_fini_breadcrumb_rcs()
828 if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74)) || IS_DG2(i915)) in gen12_emit_fini_breadcrumb_rcs()
833 if (GRAPHICS_VER(i915) == 12 && GRAPHICS_VER_FULL(i915) < IP_VER(12, 55)) in gen12_emit_fini_breadcrumb_rcs()
H A Dintel_lrc.c653 if (GRAPHICS_VER_FULL(engine->i915) >= IP_VER(12, 70)) in reg_offsets()
655 else if (GRAPHICS_VER_FULL(engine->i915) >= IP_VER(12, 55)) in reg_offsets()
666 if (GRAPHICS_VER_FULL(engine->i915) >= IP_VER(12, 55)) in reg_offsets()
679 if (GRAPHICS_VER_FULL(engine->i915) >= IP_VER(12, 55)) in lrc_ring_mi_mode()
693 if (GRAPHICS_VER_FULL(engine->i915) >= IP_VER(12, 55)) in lrc_ring_bb_offset()
708 if (GRAPHICS_VER_FULL(engine->i915) >= IP_VER(12, 55)) in lrc_ring_gpr0()
755 if (GRAPHICS_VER_FULL(engine->i915) >= IP_VER(12, 55)) in lrc_ring_cmd_buf_cctl()
828 if (GRAPHICS_VER_FULL(ce->engine->i915) >= IP_VER(12, 70) && in ctx_needs_runalone()
1364 if (IS_GFX_GT_IP_RANGE(ce->engine->gt, IP_VER(12, 0), IP_VER(12, 10))) in gen12_emit_indirect_ctx_rcs()
1368 if (IS_GFX_GT_IP_STEP(ce->engine->gt, IP_VER(12, 70), STEP_A0, STEP_B0) || in gen12_emit_indirect_ctx_rcs()
[all …]
H A Dintel_gt.h21 BUILD_BUG_ON_ZERO((from) < IP_VER(2, 0)) + \
35 BUILD_BUG_ON_ZERO((from) < IP_VER(13, 0)) + \
H A Dintel_gt.c281 } else if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 55)) { in intel_gt_clear_error_registers()
393 if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 55)) in intel_gt_check_and_clear_faults()
1017 return IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 55), IP_VER(12, 71)); in intel_gt_needs_wa_16018031267()
1022 return MEDIA_VER_FULL(gt->i915) == IP_VER(13, 0) && gt->type == GT_MEDIA; in intel_gt_needs_wa_22016122933()
H A Dintel_mocs.c461 if (IS_GFX_GT_IP_RANGE(to_gt(i915), IP_VER(12, 70), IP_VER(12, 74))) { in get_mocs_settings()
623 if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 55)) in init_l3cc_table()
H A Dintel_gt_mcr.h57 GRAPHICS_VER_FULL(gt_->i915) >= IP_VER(12, 55) ? \
H A Dintel_gtt.c28 MEDIA_VER_FULL(i915) == IP_VER(13, 0); in i915_ggtt_require_binder()
681 if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70)) in setup_private_pat()
683 else if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 55)) in setup_private_pat()
H A Dintel_engine_cs.c769 if (MEDIA_VER_FULL(i915) < IP_VER(12, 55)) in engine_mask_apply_media_fuses()
775 if (MEDIA_VER_FULL(i915) >= IP_VER(12, 55)) { in engine_mask_apply_media_fuses()
1178 if (MEDIA_VER_FULL(i915) == IP_VER(13, 0)) { in intel_engine_init_tlb_invalidation()
1183 if (GRAPHICS_VER_FULL(i915) == IP_VER(12, 74) || in intel_engine_init_tlb_invalidation()
1184 GRAPHICS_VER_FULL(i915) == IP_VER(12, 71) || in intel_engine_init_tlb_invalidation()
1185 GRAPHICS_VER_FULL(i915) == IP_VER(12, 70) || in intel_engine_init_tlb_invalidation()
1186 GRAPHICS_VER_FULL(i915) == IP_VER(12, 55)) { in intel_engine_init_tlb_invalidation()
1189 } else if (GRAPHICS_VER_FULL(i915) == IP_VER(12, 0) || in intel_engine_init_tlb_invalidation()
1190 GRAPHICS_VER_FULL(i915) == IP_VER(12, 10)) { in intel_engine_init_tlb_invalidation()
1809 if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 55)) { in intel_engine_get_instdone()
H A Dintel_reset.c291 loops = GRAPHICS_VER_FULL(gt->i915) < IP_VER(12, 70) ? 2 : 1; in gen6_hw_domain_reset()
709 if (MEDIA_VER_FULL(gt->i915) != IP_VER(13, 0) || !HAS_ENGINE(gt, GSC0)) in needs_wa_14015076503()
1715 if (IS_GFX_GT_IP_STEP(gt, IP_VER(12, 70), STEP_A0, STEP_B0)) in intel_engine_reset_needs_wa_22011802037()
1718 if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70)) in intel_engine_reset_needs_wa_22011802037()
H A Dintel_sseu.c636 if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 55)) in intel_sseu_info_init()
845 else if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 55)) in intel_sseu_print_topology()
/linux-6.15/drivers/gpu/drm/i915/
H A Di915_getparam.c170 if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 55)) in i915_getparam_ioctl()
179 if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 55)) in i915_getparam_ioctl()
H A Di915_drv.h397 #define IP_VER(ver, rel) ((ver) << 8 | (rel)) macro
400 #define GRAPHICS_VER_FULL(i915) IP_VER(RUNTIME_INFO(i915)->graphics.ip.ver, \
406 #define MEDIA_VER_FULL(i915) IP_VER(RUNTIME_INFO(i915)->media.ip.ver, \
738 GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70))
H A Dintel_device_info.c317 if (IP_VER(ip->ver, ip->rel) < IP_VER(expected_ver, expected_rel)) in ip_ver_read()
H A Di915_perf.c295 #define HAS_MI_SET_PREDICATE(i915) (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 55))
823 GRAPHICS_VER_FULL(stream->engine->i915) < IP_VER(12, 55)) { in gen8_append_oa_reports()
1425 } else if (GRAPHICS_VER_FULL(stream->engine->i915) >= IP_VER(12, 55)) { in gen12_get_render_context_id()
3197 if (IS_DG2(i915) || IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74))) { in i915_perf_oa_timestamp_frequency()
4093 if (GRAPHICS_VER_FULL(perf->i915) >= IP_VER(12, 55)) { in read_properties_unlocked()
4162 if (IS_MEDIA_GT_IP_STEP(props->engine->gt, IP_VER(13, 0), STEP_A0, STEP_C0) && in read_properties_unlocked()
4460 GRAPHICS_VER_FULL(perf->i915) >= IP_VER(12, 70)) in mtl_is_valid_oam_b_counter_addr()
4475 if (GRAPHICS_VER_FULL(perf->i915) >= IP_VER(12, 70)) in gen12_is_valid_mux_addr()
4837 if (GRAPHICS_VER_FULL(engine->i915) >= IP_VER(12, 70)) { in __oam_engine_group()
4910 } else if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70)) { in oa_init_groups()
[all …]
H A Di915_debugfs.c146 if (IS_GFX_GT_IP_RANGE(to_gt(i915), IP_VER(12, 70), IP_VER(12, 74))) { in i915_cache_level_str()
H A Di915_irq.c1180 if (GRAPHICS_VER_FULL(dev_priv) >= IP_VER(12, 10)) in intel_irq_handler()
1203 if (GRAPHICS_VER_FULL(dev_priv) >= IP_VER(12, 10)) in intel_irq_reset()
1226 if (GRAPHICS_VER_FULL(dev_priv) >= IP_VER(12, 10)) in intel_irq_postinstall()
H A Dintel_uncore.c2173 if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70)) in intel_uncore_fw_domains_init()
2353 if (IS_DGFX(i915) || GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70)) in intel_uncore_setup_mmio()
2428 if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70)) { in uncore_forcewake_init()
2432 } else if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 55)) { in uncore_forcewake_init()
2582 if (GRAPHICS_VER_FULL(uncore->i915) >= IP_VER(12, 55) && i % 2 == 0) { in intel_uncore_prune_engine_fw_domains()
/linux-6.15/drivers/gpu/drm/i915/gt/uc/
H A Dintel_guc_ads.c415 if (GRAPHICS_VER_FULL(engine->i915) >= IP_VER(12, 55)) in guc_mmio_regset_init()
525 #define LR_HW_CONTEXT_SZ(i915) (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 55) ? \
852 if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74))) { in guc_waklv_init()
861 (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74)) || in guc_waklv_init()
862 IS_MEDIA_GT_IP_RANGE(gt, IP_VER(13, 0), IP_VER(13, 0)) || in guc_waklv_init()
H A Dintel_guc_hwconfig.c102 if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 55)) in has_table()
H A Dintel_guc.c297 GRAPHICS_VER_FULL(gt->i915) < IP_VER(12, 55)) in guc_ctl_wa_flags()
301 if (IS_GFX_GT_IP_STEP(gt, IP_VER(12, 70), STEP_A0, STEP_B0) || in guc_ctl_wa_flags()
307 if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74))) in guc_ctl_wa_flags()
H A Dintel_guc_fw.c29 if (GRAPHICS_VER_FULL(uncore->i915) < IP_VER(12, 55)) in guc_prepare_xfer()
/linux-6.15/drivers/gpu/drm/i915/gem/selftests/
H A Di915_gem_client_blt.c120 if (GRAPHICS_VER_FULL(i915) < IP_VER(12, 55)) in fastblit_supports_x_tiling()
169 if (GRAPHICS_VER_FULL(to_i915(batch->base.dev)) >= IP_VER(12, 55)) in prepare_blit()
180 if (GRAPHICS_VER_FULL(to_i915(batch->base.dev)) >= IP_VER(12, 55)) in prepare_blit()
368 } else if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 55)) { in tiled_offset()
/linux-6.15/drivers/gpu/drm/i915/selftests/
H A Di915_selftest.c271 if (IS_GFX_GT_IP_RANGE(to_gt(i915), IP_VER(12, 00), IP_VER(12, 74))) { in i915_live_selftests()

12