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Searched refs:HPD0_DC_HPD_CONTROL__DC_HPD_EN__SHIFT (Results 1 – 20 of 20) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_link_encoder.c52 #ifndef HPD0_DC_HPD_CONTROL__DC_HPD_EN__SHIFT
53 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN__SHIFT 0x1c macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_1_sh_mask.h16295 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN__SHIFT … macro
H A Ddcn_3_0_3_sh_mask.h16725 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN__SHIFT … macro
H A Ddcn_1_0_sh_mask.h27708 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h27200 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h33300 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h27728 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN__SHIFT … macro
H A Ddcn_3_5_0_sh_mask.h24534 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN__SHIFT … macro
H A Ddcn_3_5_1_sh_mask.h24513 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h32834 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h30700 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN__SHIFT … macro
H A Ddcn_3_6_0_sh_mask.h31408 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h31446 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h35442 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h33598 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h35873 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h36868 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN__SHIFT … macro
H A Ddcn_4_1_0_sh_mask.h44826 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h27752 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN__SHIFT … macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_sh_mask.h34940 #define HPD0_DC_HPD_CONTROL__DC_HPD_EN__SHIFT … macro