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Searched refs:HHI_HDMI_PLL_CNTL5 (Results 1 – 3 of 3) sorted by relevance

/linux-6.15/drivers/gpu/drm/meson/
H A Dmeson_vclk.c104 #define HHI_HDMI_PLL_CNTL5 0x330 /* 0xcc offset in data sheet */ macro
253 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x71486980); in meson_venci_cvbs_clock_config()
266 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x001fa729); in meson_venci_cvbs_clock_config()
283 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x65771290); in meson_venci_cvbs_clock_config()
509 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x71486980); in meson_hdmi_pll_set_params()
525 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x001fa729); in meson_hdmi_pll_set_params()
553 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, in meson_hdmi_pll_set_params()
558 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, in meson_hdmi_pll_set_params()
565 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL5, 0x33771290); in meson_hdmi_pll_set_params()
/linux-6.15/drivers/clk/meson/
H A Dgxbb.h101 #define HHI_HDMI_PLL_CNTL5 0x330 /* 0xcc offset in data sheet */ macro
H A Dg12a.h119 #define HHI_HDMI_PLL_CNTL5 0x334 macro