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Searched refs:HHI_HDMI_PLL_CNTL4 (Results 1 – 3 of 3) sorted by relevance

/linux-6.15/drivers/gpu/drm/meson/
H A Dmeson_vclk.c103 #define HHI_HDMI_PLL_CNTL4 0x32C /* 0xcb offset in data sheet */ macro
252 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, 0x801da72c); in meson_venci_cvbs_clock_config()
265 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, 0x0c4d000c); in meson_venci_cvbs_clock_config()
282 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, 0x6a28dc00); in meson_venci_cvbs_clock_config()
508 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, 0x801da72c); in meson_hdmi_pll_set_params()
524 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, 0x0c8e0000); in meson_hdmi_pll_set_params()
551 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, in meson_hdmi_pll_set_params()
556 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, in meson_hdmi_pll_set_params()
564 regmap_write(priv->hhi, HHI_HDMI_PLL_CNTL4, 0x0a691c00); in meson_hdmi_pll_set_params()
/linux-6.15/drivers/clk/meson/
H A Dgxbb.h100 #define HHI_HDMI_PLL_CNTL4 0x32C /* 0xcb offset in data sheet */ macro
H A Dg12a.h118 #define HHI_HDMI_PLL_CNTL4 0x330 macro