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Searched refs:GICR_ICENABLER0 (Results 1 – 4 of 4) sorted by relevance

/linux-6.15/tools/testing/selftests/kvm/lib/arm64/
H A Dgic_v3.c315 writel(~0, sgi_base + GICR_ICENABLER0); in gicv3_cpu_init()
/linux-6.15/tools/testing/selftests/kvm/include/arm64/
H A Dgic_v3.h232 #define GICR_ICENABLER0 GICD_ICENABLER macro
/linux-6.15/include/linux/irqchip/
H A Darm-gic-v3.h232 #define GICR_ICENABLER0 GICD_ICENABLER macro
/linux-6.15/arch/arm64/kvm/vgic/
H A Dvgic-mmio-v3.c698 REGISTER_DESC_WITH_LENGTH_UACCESS(SZ_64K + GICR_ICENABLER0,