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Searched refs:GEN6_BSD_RING_BASE (Results 1 – 7 of 7) sorted by relevance

/linux-6.15/drivers/gpu/drm/i915/gt/
H A Dintel_engine_regs.h38 #define GEN6_VBSYNC (RING_SYNC_0(GEN6_BSD_RING_BASE))
39 #define GEN6_VRSYNC (RING_SYNC_1(GEN6_BSD_RING_BASE))
40 #define GEN6_VVESYNC (RING_SYNC_2(GEN6_BSD_RING_BASE))
H A Dintel_ring_submission.c1047 intel_uncore_write_fw(uncore, RING_PSMI_CTL(GEN6_BSD_RING_BASE), in gen6_bsd_submit_request()
1055 RING_PSMI_CTL(GEN6_BSD_RING_BASE), in gen6_bsd_submit_request()
1068 intel_uncore_write_fw(uncore, RING_PSMI_CTL(GEN6_BSD_RING_BASE), in gen6_bsd_submit_request()
H A Dintel_rc6.c461 (intel_uncore_read(uncore, PWRCTX_MAXCNT(GEN6_BSD_RING_BASE)) & IDLE_TIME_MASK) > 1 && in bxt_check_bios_rc6_setup()
H A Dintel_engine_cs.c139 { .graphics_ver = 6, .base = GEN6_BSD_RING_BASE },
/linux-6.15/drivers/gpu/drm/i915/
H A Dintel_gvt_mmio_table.c49 MMIO_F(prefix(GEN6_BSD_RING_BASE), s); \
1253 MMIO_F(GEN8_RING_CS_GPR(GEN6_BSD_RING_BASE, 0), 0x40); in iterate_bxt_mmio()
H A Di915_reg.h289 #define GEN6_BSD_RING_BASE 0x12000 macro
/linux-6.15/drivers/gpu/drm/i915/gvt/
H A Dhandlers.c2178 MMIO_F(prefix(GEN6_BSD_RING_BASE), s, f, am, rm, d, r, w); \
2804 MMIO_F(GEN8_RING_CS_GPR(GEN6_BSD_RING_BASE, 0), 0x40, F_CMD_ACCESS, in init_bxt_mmio_info()