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Searched refs:GCSPR_EL0 (Results 1 – 4 of 4) sorted by relevance

/linux-6.15/tools/testing/selftests/arm64/gcs/
H A Dgcsstr.S18 #define GCSPR_EL0 S3_3_C2_C5_1 macro
92 mrs x0, GCSPR_EL0
H A Dgcs-stress-thread.S30 #define GCSPR_EL0 S3_3_C2_C5_1 macro
/linux-6.15/Documentation/arch/arm64/
H A Dgcs.rst28 GCSPR_EL0. This is readable by userspace but can only be updated
52 * On systems where GCS is supported GCSPR_EL0 is always readable by EL0
125 the top 8 bytes of the stack will be initialised to 0 and GCSPR_EL0 will
166 with the token type (bits 0..11) all clear. The GCSPR_EL0 reported in the
183 and GCSPR_EL0 will be restored from that context prior to further
189 * If GCS is enabled on return from a signal handler then GCSPR_EL0 must
/linux-6.15/arch/arm64/tools/
H A Dsysreg2420 Sysreg GCSPR_EL0 3 3 2 5 1