Home
last modified time | relevance | path

Searched refs:GCC_PCIE_1_PHY_BCR (Results 1 – 25 of 47) sorted by relevance

12

/linux-6.15/include/dt-bindings/reset/
H A Dqcom,gcc-apq8084.h93 #define GCC_PCIE_1_PHY_BCR 84 macro
/linux-6.15/include/dt-bindings/clock/
H A Dqcom,sar2130p-gcc.h148 #define GCC_PCIE_1_PHY_BCR 11 macro
H A Dqcom,sdx75-gcc.h173 #define GCC_PCIE_1_PHY_BCR 6 macro
H A Dqcom,gcc-sc7280.h212 #define GCC_PCIE_1_PHY_BCR 3 macro
H A Dqcom,gcc-sm8450.h214 #define GCC_PCIE_1_PHY_BCR 12 macro
H A Dqcom,sm8550-gcc.h195 #define GCC_PCIE_1_PHY_BCR 11 macro
H A Dqcom,qcs8300-gcc.h213 #define GCC_PCIE_1_PHY_BCR 9 macro
H A Dqcom,gcc-sm8150.h220 #define GCC_PCIE_1_PHY_BCR 7 macro
H A Dqcom,gcc-sdm845.h230 #define GCC_PCIE_1_PHY_BCR 25 macro
H A Dqcom,sm8650-gcc.h218 #define GCC_PCIE_1_PHY_BCR 11 macro
H A Dqcom,gcc-sm8250.h224 #define GCC_PCIE_1_PHY_BCR 12 macro
H A Dqcom,gcc-sm8350.h226 #define GCC_PCIE_1_PHY_BCR 12 macro
H A Dqcom,gcc-sc8180x.h260 #define GCC_PCIE_1_PHY_BCR 7 macro
H A Dqcom,sa8775p-gcc.h277 #define GCC_PCIE_1_PHY_BCR 15 macro
H A Dqcom,gcc-msm8996.h322 #define GCC_PCIE_1_PHY_BCR 82 macro
H A Dqcom,gcc-sc8280xp.h411 #define GCC_PCIE_1_PHY_BCR 9 macro
H A Dqcom,x1e80100-gcc.h408 #define GCC_PCIE_1_PHY_BCR 11 macro
/linux-6.15/Documentation/devicetree/bindings/phy/
H A Dqcom,msm8996-qmp-pcie-phy.yaml168 resets = <&gcc GCC_PCIE_1_PHY_BCR>;
/linux-6.15/drivers/clk/qcom/
H A Dgcc-sar2130p.c2241 [GCC_PCIE_1_PHY_BCR] = { 0x9e01c },
H A Dgcc-sdx75.c2869 [GCC_PCIE_1_PHY_BCR] = { 0x56000 },
H A Dgcc-sm8550.c3257 [GCC_PCIE_1_PHY_BCR] = { 0x8e01c },
H A Dgcc-apq8084.c3590 [GCC_PCIE_1_PHY_BCR] = { 0x1b80 },
H A Dgcc-sm8450.c3328 [GCC_PCIE_1_PHY_BCR] = { 0x9e01c },
H A Dgcc-sm8250.c3548 [GCC_PCIE_1_PHY_BCR] = { 0x8e01c },
H A Dgcc-qcs8300.c3524 [GCC_PCIE_1_PHY_BCR] = { 0xae08c },

12