Searched refs:ESR_ELx_EC_MASK (Results 1 – 6 of 6) sorted by relevance
72 #define ESR_ELx_EC_MASK (UL(0x3F) << ESR_ELx_EC_SHIFT) macro73 #define ESR_ELx_EC(esr) (((esr) & ESR_ELx_EC_MASK) >> ESR_ELx_EC_SHIFT)183 #define ESR_ELx_WFx_MASK (ESR_ELx_EC_MASK | \
74 #define ESR_ELx_EC_MASK (UL(0x3F) << ESR_ELx_EC_SHIFT) macro75 #define ESR_ELx_EC(esr) (((esr) & ESR_ELx_EC_MASK) >> ESR_ELx_EC_SHIFT)192 #define ESR_ELx_WFx_MASK (ESR_ELx_EC_MASK | \
61 u64 esr = FIELD_PREP(ESR_ELx_EC_MASK, ESR_ELx_EC_SVE) | in kvm_inject_nested_sve_trap()
442 esr &= ESR_ELx_EC_MASK | ESR_ELx_IL | in set_thread_esr()452 esr &= ESR_ELx_EC_MASK | ESR_ELx_IL; in set_thread_esr()
543 vcpu->arch.fault.esr_el2 = FIELD_PREP(ESR_ELx_EC_MASK, ESR_ELx_EC_SYS64) | in kvm_hyp_handle_impdef()
2499 esr |= FIELD_PREP(ESR_ELx_EC_MASK, ESR_ELx_EC_FPAC); in kvm_emulate_nested_eret()