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Searched refs:EN0 (Results 1 – 4 of 4) sorted by relevance

/linux-6.15/arch/mips/loongson64/
H A Dsmp.c298 (SMP_CORE_GROUP0_BASE + SMP_CORE0_OFFSET + EN0); in ipi_en0_regs_init()
300 (SMP_CORE_GROUP0_BASE + SMP_CORE1_OFFSET + EN0); in ipi_en0_regs_init()
302 (SMP_CORE_GROUP0_BASE + SMP_CORE2_OFFSET + EN0); in ipi_en0_regs_init()
304 (SMP_CORE_GROUP0_BASE + SMP_CORE3_OFFSET + EN0); in ipi_en0_regs_init()
306 (SMP_CORE_GROUP1_BASE + SMP_CORE0_OFFSET + EN0); in ipi_en0_regs_init()
308 (SMP_CORE_GROUP1_BASE + SMP_CORE1_OFFSET + EN0); in ipi_en0_regs_init()
310 (SMP_CORE_GROUP1_BASE + SMP_CORE2_OFFSET + EN0); in ipi_en0_regs_init()
312 (SMP_CORE_GROUP1_BASE + SMP_CORE3_OFFSET + EN0); in ipi_en0_regs_init()
314 (SMP_CORE_GROUP2_BASE + SMP_CORE0_OFFSET + EN0); in ipi_en0_regs_init()
316 (SMP_CORE_GROUP2_BASE + SMP_CORE1_OFFSET + EN0); in ipi_en0_regs_init()
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H A Dsmp.h22 #define EN0 0x04 macro
/linux-6.15/Documentation/devicetree/bindings/iio/adc/
H A Dadi,ad7625.yaml73 Indicates if EN0 is hard-wired to the high state. If neither this
74 nor en0-gpios are present, then EN0 is hard-wired low.
96 Configurable EN0 pin.
/linux-6.15/Documentation/devicetree/bindings/mfd/
H A Dmax77620.txt40 (EN0, EN1), and 3 master sequencing timers called FPS0, FPS1 and FPS2.
79 hardware input to PMIC i.e. EN0, EN1 or
85 for hardware input pin EN0.