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Searched refs:DSCC_PPS_CONFIG1 (Results 1 – 6 of 6) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/display/dc/dsc/dcn401/
H A Ddcn401_dsc.c119 REG_GET(DSCC_PPS_CONFIG1, BITS_PER_PIXEL, &s->dsc_bits_per_pixel); in dsc401_read_state()
121 REG_GET(DSCC_PPS_CONFIG1, CHUNK_SIZE, &s->dsc_chunk_size); in dsc401_read_state()
273 REG_SET_7(DSCC_PPS_CONFIG1, 0, in dsc_write_to_registers()
H A Ddcn401_dsc.h213 uint32_t DSCC_PPS_CONFIG1; member
/linux-6.15/drivers/gpu/drm/amd/display/dc/dsc/dcn20/
H A Ddcn20_dsc.c155 REG_GET(DSCC_PPS_CONFIG1, BITS_PER_PIXEL, &s->dsc_bits_per_pixel); in dsc2_read_state()
157 REG_GET(DSCC_PPS_CONFIG1, CHUNK_SIZE, &s->dsc_chunk_size); in dsc2_read_state()
640 REG_SET_7(DSCC_PPS_CONFIG1, 0, in dsc_write_to_registers()
H A Ddcn20_dsc.h42 SRI(DSCC_PPS_CONFIG1, DSCC, id),\
469 uint32_t DSCC_PPS_CONFIG1; member
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn401/
H A Ddcn401_resource.h426 SRI_ARR(DSCC_PPS_CONFIG1, DSCC, id), \
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource.h727 SRI_ARR(DSCC_PPS_CONFIG1, DSCC, id), \