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Searched refs:DRAMClockChangeSupport (Results 1 – 23 of 23) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddml2_wrapper.c135 if (p->cur_mode_support_info->DRAMClockChangeSupport[0] == dml_dram_clock_change_unsupported) { in optimize_configuration()
273 if (dml_result && s->evaluation_info.DRAMClockChangeSupport[0] == dml_dram_clock_change_vactive) { in calculate_lowest_supported_state_for_temp_read()
453 …} else if (s->mode_support_info.DRAMClockChangeSupport[0] != dml_dram_clock_change_unsupported && … in optimize_pstate_with_svp_and_drr()
484 if (s->mode_support_info.DRAMClockChangeSupport[0] != dml_dram_clock_change_unsupported) { in optimize_pstate_with_svp_and_drr()
485 …idate_static_schedulability(dml2, display_state, s->mode_support_info.DRAMClockChangeSupport[0])) { in optimize_pstate_with_svp_and_drr()
504 …if (result && s->mode_support_info.DRAMClockChangeSupport[0] != dml_dram_clock_change_unsupported)… in optimize_pstate_with_svp_and_drr()
643 …out_clks.p_state_supported = s->mode_support_info.DRAMClockChangeSupport[0] != dml_dram_clock_chan… in dml2_validate_and_build_resource()
833 …*dram_clk_change_support = (unsigned int) dml2->v20.dml_core_ctx.ms.support.DRAMClockChangeSupport… in dml2_extract_dram_and_fclk_change_support()
H A Ddisplay_mode_core.c3038 *p->DRAMClockChangeSupport = dml_dram_clock_change_vactive; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
3040 *p->DRAMClockChangeSupport = dml_dram_clock_change_vblank; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
3042 *p->DRAMClockChangeSupport = dml_dram_clock_change_vblank_drr; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
3044 *p->DRAMClockChangeSupport = dml_dram_clock_change_unsupported; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
3054 *p->DRAMClockChangeSupport = dml_dram_clock_change_unsupported; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
3058 *p->DRAMClockChangeSupport = dml_dram_clock_change_vactive_w_mall_sub_vp; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
3060 *p->DRAMClockChangeSupport = dml_dram_clock_change_vblank_w_mall_sub_vp; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
3064 *p->DRAMClockChangeSupport = dml_dram_clock_change_unsupported; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6700 …CalculateWatermarks_params->DRAMClockChangeSupport = &mode_lib->ms.support.DRAMClockChangeSupport[… in dml_prefetch_check()
8202 …((mode_lib->ms.support.DRAMClockChangeSupport[1] == dml_dram_clock_change_vblank || mode_lib->ms.s… in dml_core_mode_support()
[all …]
H A Ddisplay_mode_util.c492 if (!fail_only || support->DRAMClockChangeSupport[j] == dml_dram_clock_change_unsupported) in dml_print_dml_mode_support_info()
493 …("DML: support: combine=%d, DRAMClockChangeSupport = %d\n", j, support->DRAMClockChangeSupport[j]); in dml_print_dml_mode_support_info()
H A Ddisplay_mode_core_structs.h774 enum dml_dram_clock_change_support DRAMClockChangeSupport[2]; member
1254 enum dml_dram_clock_change_support DRAMClockChangeSupport; member
1382 enum dml_dram_clock_change_support *DRAMClockChangeSupport; member
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddcn32_fpu.c290 …vba->DRAMClockChangeSupport[vlevel][context->bw_ctx.dml.vba.maxMpcComb] = temp_clock_change_suppor… in dcn32_find_dummy_latency_index_for_fw_based_mclk_switch()
296 if (vba->DRAMClockChangeSupport[vlevel][vba->maxMpcComb] == dm_dram_clock_change_unsupported && in dcn32_find_dummy_latency_index_for_fw_based_mclk_switch()
298 …vba->DRAMClockChangeSupport[vlevel][context->bw_ctx.dml.vba.maxMpcComb] = temp_clock_change_suppor… in dcn32_find_dummy_latency_index_for_fw_based_mclk_switch()
301 vba->DRAMClockChangeSupport[vlevel][vba->maxMpcComb] != dm_dram_clock_change_unsupported) in dcn32_find_dummy_latency_index_for_fw_based_mclk_switch()
1489 vba->DRAMClockChangeSupport[*vlevel][vba->maxMpcComb] != dm_dram_clock_change_unsupported) || in dcn32_full_validate_bw_helper()
1490 vba->DRAMClockChangeSupport[*vlevel][vba->maxMpcComb] == dm_dram_clock_change_unsupported || in dcn32_full_validate_bw_helper()
1529 if (vba->DRAMClockChangeSupport[i][vba->maxMpcComb] != dm_dram_clock_change_unsupported) { in dcn32_full_validate_bw_helper()
1561 vba->DRAMClockChangeSupport[*vlevel][vba->maxMpcComb] = dm_dram_clock_change_unsupported; in dcn32_full_validate_bw_helper()
1663 context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][context->bw_ctx.dml.vba.maxMpcComb] in dcn32_calculate_dlg_params()
2183 vba->DRAMClockChangeSupport[vlevel][vba->maxMpcComb] == dm_dram_clock_change_unsupported))) { in dcn32_internal_validate_bw()
[all …]
H A Ddisplay_mode_vba_util_32.c4282 enum clock_change_support *DRAMClockChangeSupport, in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport() argument
4576 *DRAMClockChangeSupport = dm_dram_clock_change_vactive; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
4578 *DRAMClockChangeSupport = dm_dram_clock_change_vblank; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
4580 *DRAMClockChangeSupport = dm_dram_clock_change_unsupported; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
4583 *DRAMClockChangeSupport = dm_dram_clock_change_vactive_w_mall_full_frame; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
4585 *DRAMClockChangeSupport = dm_dram_clock_change_vblank_w_mall_full_frame; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
4587 *DRAMClockChangeSupport = dm_dram_clock_change_unsupported; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
4590 *DRAMClockChangeSupport = dm_dram_clock_change_vactive_w_mall_sub_vp; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
4592 *DRAMClockChangeSupport = dm_dram_clock_change_vblank_w_mall_sub_vp; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
4594 *DRAMClockChangeSupport = dm_dram_clock_change_unsupported; in dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
[all …]
H A Ddisplay_mode_vba_util_32.h827 enum clock_change_support *DRAMClockChangeSupport,
H A Ddisplay_mode_vba_32.c1711 || mode_lib->vba.DRAMClockChangeSupport[i][j] != dm_dram_clock_change_unsupported) in mode_support_configuration()
3608 &v->DRAMClockChangeSupport[i][j], in dml32_ModeSupportAndSystemConfigurationFull()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn30/
H A Ddcn30_fpu.c312 …bool pstate_en = context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][maxMpcComb] != dm_dram_clo… in dcn30_fpu_calculate_wm_and_dlg()
345 …pstate_en = context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][maxMpcComb] != dm_dram_clock_ch… in dcn30_fpu_calculate_wm_and_dlg()
414 if (context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][maxMpcComb] == in dcn30_fpu_calculate_wm_and_dlg()
H A Ddisplay_mode_vba_30.c345 enum clock_change_support *DRAMClockChangeSupport,
2728 enum clock_change_support DRAMClockChangeSupport = 0; // dummy in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() local
2780 &DRAMClockChangeSupport, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
5057 &v->DRAMClockChangeSupport[i][j], in dml30_ModeSupportAndSystemConfigurationFull()
5229 enum clock_change_support *DRAMClockChangeSupport, in CalculateWatermarksAndDRAMSpeedChangeSupport()
5375 *DRAMClockChangeSupport = dm_dram_clock_change_vactive; in CalculateWatermarksAndDRAMSpeedChangeSupport()
5377 *DRAMClockChangeSupport = dm_dram_clock_change_vblank; in CalculateWatermarksAndDRAMSpeedChangeSupport()
5379 *DRAMClockChangeSupport = dm_dram_clock_change_unsupported; in CalculateWatermarksAndDRAMSpeedChangeSupport()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/
H A Ddml2_core_shared_types.h255 enum dml2_pstate_change_support DRAMClockChangeSupport[DML2_MAX_PLANES]; member
809 enum dml2_pstate_change_support DRAMClockChangeSupport[DML2_MAX_PLANES]; member
1582 enum dml2_pstate_change_support *DRAMClockChangeSupport; member
H A Ddml2_core_dcn4_calcs.c6917 p->DRAMClockChangeSupport[k] = dml2_pstate_change_unsupported; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6923 p->DRAMClockChangeSupport[k] = dml2_pstate_change_vactive; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6925 p->DRAMClockChangeSupport[k] = dml2_pstate_change_vblank; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6927 p->DRAMClockChangeSupport[k] = dml2_pstate_change_vactive; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6929 p->DRAMClockChangeSupport[k] = dml2_pstate_change_vblank; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6931 p->DRAMClockChangeSupport[k] = dml2_pstate_change_drr; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6933 p->DRAMClockChangeSupport[k] = dml2_pstate_change_mall_svp; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6935 p->DRAMClockChangeSupport[k] = dml2_pstate_change_mall_full_frame; in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
6937 if (p->DRAMClockChangeSupport[k] == dml2_pstate_change_unsupported) in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
9496 CalculateWatermarks_params->DRAMClockChangeSupport = mode_lib->ms.support.DRAMClockChangeSupport; in dml_core_mode_support()
[all …]
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddcn31_fpu.c471 …if (context->bw_ctx.dml.vba.DRAMClockChangeSupport[context->bw_ctx.dml.vba.VoltageLevel][context->… in dcn315_update_soc_for_wm_a()
562 …context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][context->bw_ctx.dml.vba.maxMpcComb] == dm_d… in dcn31_calculate_wm_and_dlg_fp()
H A Ddisplay_mode_vba_31.c312 enum clock_change_support *DRAMClockChangeSupport,
2933 enum clock_change_support DRAMClockChangeSupport; // dummy local
2954 &DRAMClockChangeSupport,
5364 &v->DRAMClockChangeSupport[i][j],
5562 enum clock_change_support *DRAMClockChangeSupport, argument
5726 *DRAMClockChangeSupport = dm_dram_clock_change_vactive;
5729 *DRAMClockChangeSupport = dm_dram_clock_change_vblank;
5731 *DRAMClockChangeSupport = dm_dram_clock_change_unsupported;
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn21/
H A Ddisplay_mode_vba_21.c334 enum clock_change_support *DRAMClockChangeSupport,
2413 enum clock_change_support DRAMClockChangeSupport; // dummy in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() local
2463 &DRAMClockChangeSupport, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
5033 &locals->DRAMClockChangeSupport[i][j], in dml21_ModeSupportAndSystemConfigurationFull()
5200 && ((locals->DRAMClockChangeSupport[i][1] == dm_dram_clock_change_vactive in dml21_ModeSupportAndSystemConfigurationFull()
5201 && locals->DRAMClockChangeSupport[i][0] != dm_dram_clock_change_vactive) in dml21_ModeSupportAndSystemConfigurationFull()
5202 || (locals->DRAMClockChangeSupport[i][1] == dm_dram_clock_change_vblank in dml21_ModeSupportAndSystemConfigurationFull()
5288 enum clock_change_support *DRAMClockChangeSupport, in CalculateWatermarksAndDRAMSpeedChangeSupport()
5495 *DRAMClockChangeSupport = dm_dram_clock_change_vactive; in CalculateWatermarksAndDRAMSpeedChangeSupport()
5500 *DRAMClockChangeSupport = dm_dram_clock_change_vblank; in CalculateWatermarksAndDRAMSpeedChangeSupport()
[all …]
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource_helpers.c744 vba->DRAMClockChangeSupport[vlevel][vba->maxMpcComb] == dm_dram_clock_change_vblank_w_mall_sub_vp) in dcn32_subvp_vblank_admissable()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddisplay_mode_vba_20v2.c2646 mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vactive; in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2649 mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vactive; in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2656 mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vblank; in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2659 mode_lib->vba.DRAMClockChangeSupport[0][0] = in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2664 mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_unsupported; in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2670 mode_lib->vba.DRAMClockChangeSupport[k][j] = mode_lib->vba.DRAMClockChangeSupport[0][0]; in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
H A Ddisplay_mode_vba_20.c2581 mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vactive; in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2584 mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vblank; in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2587 mode_lib->vba.DRAMClockChangeSupport[0][0] = in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2592 mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_unsupported; in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2597 mode_lib->vba.DRAMClockChangeSupport[k][j] = mode_lib->vba.DRAMClockChangeSupport[0][0]; in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
H A Ddcn20_fpu.c1165 context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][context->bw_ctx.dml.vba.maxMpcComb] in dcn20_calculate_dlg_params()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_vba.h847 enum clock_change_support DRAMClockChangeSupport[DC__VOLTAGE_STATES][2]; member
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn314/
H A Ddisplay_mode_vba_314.c321 enum clock_change_support *DRAMClockChangeSupport,
2951 enum clock_change_support DRAMClockChangeSupport; // dummy local
2973 &DRAMClockChangeSupport,
5450 &v->DRAMClockChangeSupport[i][j],
5656 enum clock_change_support *DRAMClockChangeSupport, argument
5820 *DRAMClockChangeSupport = dm_dram_clock_change_vactive;
5823 *DRAMClockChangeSupport = dm_dram_clock_change_vblank;
5825 *DRAMClockChangeSupport = dm_dram_clock_change_unsupported;
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn30/
H A Ddcn30_resource.c1647 context->bw_ctx.dml.vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vactive; in dcn30_internal_validate_bw()
1673 vba->DRAMClockChangeSupport[vlevel][vba->maxMpcComb] == dm_dram_clock_change_unsupported)) { in dcn30_internal_validate_bw()
/linux-6.15/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_hw_sequencer.c616 if (vba->DRAMClockChangeSupport[vba->VoltageLevel][vba->maxMpcComb] != in set_p_state_switch_method()