Searched refs:DP_TP_CTL_TRAIN_PAT4_SEL_MASK (Results 1 – 2 of 2) sorted by relevance
238 DP_TP_CTL_TRAIN_PAT4_SEL_MASK | DP_TP_CTL_LINK_TRAIN_MASK, in intel_dp_phy_pattern_update()299 DP_TP_CTL_TRAIN_PAT4_SEL_MASK | DP_TP_CTL_LINK_TRAIN_MASK, in intel_dp_phy_pattern_update()
3556 #define DP_TP_CTL_TRAIN_PAT4_SEL_MASK REG_GENMASK(20, 19) macro3557 #define DP_TP_CTL_TRAIN_PAT4_SEL_TP4A REG_FIELD_PREP(DP_TP_CTL_TRAIN_PAT4_SEL_MASK, 0)3558 #define DP_TP_CTL_TRAIN_PAT4_SEL_TP4B REG_FIELD_PREP(DP_TP_CTL_TRAIN_PAT4_SEL_MASK, 1)3559 #define DP_TP_CTL_TRAIN_PAT4_SEL_TP4C REG_FIELD_PREP(DP_TP_CTL_TRAIN_PAT4_SEL_MASK, 2)