Searched refs:DP_LANE_ALIGN_STATUS_UPDATED (Results 1 – 7 of 7) sorted by relevance
| /linux-6.15/drivers/gpu/drm/amd/display/dc/link/protocols/ |
| H A D | link_dp_irq_handler.c | 321 DP_LANE_ALIGN_STATUS_UPDATED, in read_dpcd204h_on_irq_hpd()
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| /linux-6.15/drivers/gpu/drm/display/ |
| H A D | drm_dp_helper.c | 98 DP_LANE_ALIGN_STATUS_UPDATED); in drm_dp_channel_eq_ok()
172 lane_align = dp_link_status(link_status, DP_LANE_ALIGN_STATUS_UPDATED); in drm_dp_128b132b_lane_channel_eq_done()
204 u8 status = dp_link_status(link_status, DP_LANE_ALIGN_STATUS_UPDATED); in drm_dp_128b132b_eq_interlane_align_done()
213 u8 status = dp_link_status(link_status, DP_LANE_ALIGN_STATUS_UPDATED); in drm_dp_128b132b_cds_interlane_align_done()
222 u8 status = dp_link_status(link_status, DP_LANE_ALIGN_STATUS_UPDATED); in drm_dp_128b132b_link_training_failed()
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| /linux-6.15/drivers/gpu/drm/bridge/analogix/ |
| H A D | analogix_dp_core.c | 476 retval = drm_dp_dpcd_readb(&dp->aux, DP_LANE_ALIGN_STATUS_UPDATED, in analogix_dp_process_equalizer_training()
655 ret = drm_dp_dpcd_readb(&dp->aux, DP_LANE_ALIGN_STATUS_UPDATED, in analogix_dp_fast_link_train()
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| /linux-6.15/include/drm/display/ |
| H A D | drm_dp.h | 789 #define DP_LANE_ALIGN_STATUS_UPDATED 0x204 macro
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| /linux-6.15/drivers/gpu/drm/msm/dp/ |
| H A D | dp_link.c | 985 if (get_link_status(link->link_status, DP_LANE_ALIGN_STATUS_UPDATED) & in msm_dp_link_process_ds_port_status_change()
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| /linux-6.15/drivers/gpu/drm/gma500/ |
| H A D | cdv_intel_dp.c | 1339 DP_LANE_ALIGN_STATUS_UPDATED); in cdv_intel_channel_eq_ok()
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| /linux-6.15/drivers/gpu/drm/i915/gvt/ |
| H A D | handlers.c | 1160 dpcd->data[DP_LANE_ALIGN_STATUS_UPDATED] |= in dp_aux_ch_ctl_link_training()
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