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Searched refs:DPU_CLK_CTRL_WB2 (Results 1 – 13 of 13) sorted by relevance

/linux-6.15/drivers/gpu/drm/msm/disp/dpu1/catalog/
H A Ddpu_5_4_sm6125.h30 [DPU_CLK_CTRL_WB2] = { .reg_off = 0x2bc, .bit_off = 16 },
150 .clk_ctrl = DPU_CLK_CTRL_WB2,
H A Ddpu_6_2_sc7180.h27 [DPU_CLK_CTRL_WB2] = { .reg_off = 0x2bc, .bit_off = 16 },
162 .clk_ctrl = DPU_CLK_CTRL_WB2,
H A Ddpu_6_4_sm6350.h29 [DPU_CLK_CTRL_WB2] = { .reg_off = 0x2bc, .bit_off = 16 },
156 .clk_ctrl = DPU_CLK_CTRL_WB2,
H A Ddpu_7_2_sc7280.h27 [DPU_CLK_CTRL_WB2] = { .reg_off = 0x2bc, .bit_off = 16 },
174 .clk_ctrl = DPU_CLK_CTRL_WB2,
H A Ddpu_5_3_sm6150.h30 [DPU_CLK_CTRL_WB2] = { .reg_off = 0x2bc, .bit_off = 16 },
173 .clk_ctrl = DPU_CLK_CTRL_WB2,
H A Ddpu_5_2_sm7150.h33 [DPU_CLK_CTRL_WB2] = { .reg_off = 0x2bc, .bit_off = 16 },
266 .clk_ctrl = DPU_CLK_CTRL_WB2,
H A Ddpu_5_0_sm8150.h36 [DPU_CLK_CTRL_WB2] = { .reg_off = 0x2bc, .bit_off = 16 },
303 .clk_ctrl = DPU_CLK_CTRL_WB2,
H A Ddpu_6_0_sm8250.h34 [DPU_CLK_CTRL_WB2] = { .reg_off = 0x2bc, .bit_off = 16 },
343 .clk_ctrl = DPU_CLK_CTRL_WB2,
H A Ddpu_7_0_sm8350.h33 [DPU_CLK_CTRL_WB2] = { .reg_off = 0x2bc, .bit_off = 16 },
310 .clk_ctrl = DPU_CLK_CTRL_WB2,
H A Ddpu_5_1_sc8180x.h36 [DPU_CLK_CTRL_WB2] = { .reg_off = 0x2bc, .bit_off = 16 },
310 .clk_ctrl = DPU_CLK_CTRL_WB2,
H A Ddpu_8_1_sm8450.h34 [DPU_CLK_CTRL_WB2] = { .reg_off = 0x2bc, .bit_off = 16 },
326 .clk_ctrl = DPU_CLK_CTRL_WB2,
H A Ddpu_8_4_sa8775p.h33 [DPU_CLK_CTRL_WB2] = { .reg_off = 0x2bc, .bit_off = 16 },
335 .clk_ctrl = DPU_CLK_CTRL_WB2,
/linux-6.15/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_catalog.h446 DPU_CLK_CTRL_WB2, enumerator