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Searched refs:DPU_CLK_CTRL_DMA3 (Results 1 – 11 of 11) sorted by relevance

/linux-6.15/drivers/gpu/drm/msm/disp/dpu1/catalog/
H A Ddpu_5_3_sm6150.h29 [DPU_CLK_CTRL_DMA3] = { .reg_off = 0x2c4, .bit_off = 8 },
108 .clk_ctrl = DPU_CLK_CTRL_DMA3,
H A Ddpu_3_0_msm8998.h35 [DPU_CLK_CTRL_DMA3] = { .reg_off = 0x2c4, .bit_off = 12 },
131 .clk_ctrl = DPU_CLK_CTRL_DMA3,
H A Ddpu_4_0_sdm845.h35 [DPU_CLK_CTRL_DMA3] = { .reg_off = 0x2c4, .bit_off = 8 },
129 .clk_ctrl = DPU_CLK_CTRL_DMA3,
H A Ddpu_5_0_sm8150.h35 [DPU_CLK_CTRL_DMA3] = { .reg_off = 0x2c4, .bit_off = 8 },
139 .clk_ctrl = DPU_CLK_CTRL_DMA3,
H A Ddpu_6_0_sm8250.h32 [DPU_CLK_CTRL_DMA3] = { .reg_off = 0x2c4, .bit_off = 8 },
137 .clk_ctrl = DPU_CLK_CTRL_DMA3,
H A Ddpu_7_0_sm8350.h32 [DPU_CLK_CTRL_DMA3] = { .reg_off = 0x2c4, .bit_off = 8 },
137 .clk_ctrl = DPU_CLK_CTRL_DMA3,
H A Ddpu_5_1_sc8180x.h35 [DPU_CLK_CTRL_DMA3] = { .reg_off = 0x2c4, .bit_off = 8 },
138 .clk_ctrl = DPU_CLK_CTRL_DMA3,
H A Ddpu_8_1_sm8450.h33 [DPU_CLK_CTRL_DMA3] = { .reg_off = 0x2c4, .bit_off = 8 },
138 .clk_ctrl = DPU_CLK_CTRL_DMA3,
H A Ddpu_8_0_sc8280xp.h33 [DPU_CLK_CTRL_DMA3] = { .reg_off = 0x2c4, .bit_off = 8 },
137 .clk_ctrl = DPU_CLK_CTRL_DMA3,
H A Ddpu_8_4_sa8775p.h32 [DPU_CLK_CTRL_DMA3] = { .reg_off = 0x2c4, .bit_off = 8 },
137 .clk_ctrl = DPU_CLK_CTRL_DMA3,
/linux-6.15/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_catalog.h439 DPU_CLK_CTRL_DMA3, enumerator