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Searched refs:DPLL_FPA01_P1_POST_DIV_SHIFT (Results 1 – 6 of 6) sorted by relevance

/linux-6.15/drivers/gpu/drm/gma500/
H A Dpsb_intel_display.c344 DPLL_FPA01_P1_POST_DIV_SHIFT); in psb_intel_crtc_clock_get()
360 DPLL_FPA01_P1_POST_DIV_SHIFT) + 2; in psb_intel_crtc_clock_get()
H A Dcdv_intel_display.c875 DPLL_FPA01_P1_POST_DIV_SHIFT); in cdv_intel_crtc_clock_get()
895 DPLL_FPA01_P1_POST_DIV_SHIFT) + 2; in cdv_intel_crtc_clock_get()
H A Dpsb_intel_reg.h254 #define DPLL_FPA01_P1_POST_DIV_SHIFT 16 macro
/linux-6.15/drivers/gpu/drm/i915/display/
H A Dintel_dpll.c453 DPLL_FPA01_P1_POST_DIV_SHIFT); in i9xx_crtc_clock_get()
484 DPLL_FPA01_P1_POST_DIV_SHIFT); in i9xx_crtc_clock_get()
495 DPLL_FPA01_P1_POST_DIV_SHIFT) + 2; in i9xx_crtc_clock_get()
1034 dpll |= (1 << (clock->p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT; in i9xx_dpll()
1040 dpll |= (1 << (clock->p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT; in i9xx_dpll()
1108 dpll |= (1 << (clock->p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT; in i8xx_dpll()
1113 dpll |= (clock->p1 - 2) << DPLL_FPA01_P1_POST_DIV_SHIFT; in i8xx_dpll()
1319 dpll |= (1 << (clock->p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT; in ilk_dpll()
H A Dintel_display.c8156 ((clock.p1 - 2) << DPLL_FPA01_P1_POST_DIV_SHIFT) | in i830_enable_pipe()
/linux-6.15/drivers/gpu/drm/i915/
H A Di915_reg.h777 #define DPLL_FPA01_P1_POST_DIV_SHIFT 16 macro