Searched refs:DPLLB_LVDS_P2_CLOCK_DIV_7 (Results 1 – 4 of 4) sorted by relevance
179 dpll |= DPLLB_LVDS_P2_CLOCK_DIV_7; in psb_intel_crtc_mode_set()
239 #define DPLLB_LVDS_P2_CLOCK_DIV_7 (1 << 24) /* i915 */ macro
461 clock.p2 = dpll & DPLLB_LVDS_P2_CLOCK_DIV_7 ? in i9xx_crtc_clock_get()1049 dpll |= DPLLB_LVDS_P2_CLOCK_DIV_7; in i9xx_dpll()1328 dpll |= DPLLB_LVDS_P2_CLOCK_DIV_7; in ilk_dpll()
740 #define DPLLB_LVDS_P2_CLOCK_DIV_7 (1 << 24) /* i915 */ macro