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Searched refs:DPIO_CH1 (Results 1 – 6 of 6) sorted by relevance

/linux-6.15/drivers/gpu/drm/i915/
H A Dintel_gvt_mmio_table.c1185 MMIO_D(BXT_PORT_PLL_EBB_0(DPIO_PHY0, DPIO_CH1)); in iterate_bxt_mmio()
1186 MMIO_D(BXT_PORT_PLL_EBB_4(DPIO_PHY0, DPIO_CH1)); in iterate_bxt_mmio()
1193 MMIO_D(BXT_PORT_TX_DW2_GRP(DPIO_PHY0, DPIO_CH1)); in iterate_bxt_mmio()
1202 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 0)); in iterate_bxt_mmio()
1203 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 1)); in iterate_bxt_mmio()
1204 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 2)); in iterate_bxt_mmio()
1205 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 3)); in iterate_bxt_mmio()
1206 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 6)); in iterate_bxt_mmio()
1207 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 8)); in iterate_bxt_mmio()
1208 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH1, 9)); in iterate_bxt_mmio()
[all …]
/linux-6.15/drivers/gpu/drm/i915/display/
H A Dintel_dpio_phy.c175 [DPIO_CH1] = { .port = PORT_C },
264 port == phy_info->channel[DPIO_CH1].port) { in bxt_port_to_phy_channel()
266 *ch = DPIO_CH1; in bxt_port_to_phy_channel()
669 return DPIO_CH1; in vlv_dig_port_to_channel()
711 return DPIO_CH1; in vlv_pipe_to_channel()
876 !chv_phy_powergate_ch(display, DPIO_PHY0, DPIO_CH1, true); in chv_phy_pre_pll_enable()
891 if (ch == DPIO_CH1) in chv_phy_pre_pll_enable()
899 if (ch == DPIO_CH1) in chv_phy_pre_pll_enable()
1022 chv_phy_powergate_ch(display, DPIO_PHY0, DPIO_CH1, false); in chv_phy_release_cl2_override()
H A Dintel_display_power_well.c1346 PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH1) | in assert_chv_phy_status()
1347 PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH1, 0) | in assert_chv_phy_status()
1348 PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH1, 1)); in assert_chv_phy_status()
1368 PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH1))) in assert_chv_phy_status()
1377 PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH1)) && in assert_chv_phy_status()
1379 phy_status |= PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH1); in assert_chv_phy_status()
1389 PHY_CH_POWER_DOWN_OVRD(0x3, DPIO_PHY0, DPIO_CH1))) in assert_chv_phy_status()
1390 phy_status |= PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH1, 0); in assert_chv_phy_status()
1392 PHY_CH_POWER_DOWN_OVRD(0xc, DPIO_PHY0, DPIO_CH1))) in assert_chv_phy_status()
1393 phy_status |= PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH1, 1); in assert_chv_phy_status()
[all …]
H A Dintel_dpio_phy.h20 DPIO_CH1, enumerator
H A Dintel_display_power.c1770 PHY_CH_POWER_MODE(PHY_CH_DEEP_PSR, DPIO_PHY0, DPIO_CH1) | in chv_phy_control_init()
1799 PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY0, DPIO_CH1); in chv_phy_control_init()
1802 PHY_CH_POWER_DOWN_OVRD(mask, DPIO_PHY0, DPIO_CH1); in chv_phy_control_init()
/linux-6.15/drivers/gpu/drm/i915/gvt/
H A Dhandlers.c565 ch = DPIO_CH1; in bxt_vgpu_get_dp_bitrate()
2790 MMIO_DH(BXT_PORT_PCS_DW12_GRP(DPIO_PHY0, DPIO_CH1), D_BXT, in init_bxt_mmio_info()
2792 MMIO_DH(BXT_PORT_TX_DW3_LN(DPIO_PHY0, DPIO_CH1, 0), D_BXT, in init_bxt_mmio_info()