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Searched refs:DPIO_CH0 (Results 1 – 7 of 7) sorted by relevance

/linux-6.15/drivers/gpu/drm/i915/
H A Dintel_gvt_mmio_table.c1177 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 0)); in iterate_bxt_mmio()
1178 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 1)); in iterate_bxt_mmio()
1179 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 2)); in iterate_bxt_mmio()
1180 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 3)); in iterate_bxt_mmio()
1181 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 6)); in iterate_bxt_mmio()
1182 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 8)); in iterate_bxt_mmio()
1183 MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 9)); in iterate_bxt_mmio()
1227 MMIO_D(BXT_PORT_PLL(DPIO_PHY1, DPIO_CH0, 0)); in iterate_bxt_mmio()
1228 MMIO_D(BXT_PORT_PLL(DPIO_PHY1, DPIO_CH0, 1)); in iterate_bxt_mmio()
1229 MMIO_D(BXT_PORT_PLL(DPIO_PHY1, DPIO_CH0, 2)); in iterate_bxt_mmio()
[all …]
/linux-6.15/drivers/gpu/drm/i915/display/
H A Dintel_display_power_well.c1344 PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH0, 0) | in assert_chv_phy_status()
1345 PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH0, 1) | in assert_chv_phy_status()
1352 PHY_STATUS_SPLINE_LDO(DPIO_PHY1, DPIO_CH0, 0) | in assert_chv_phy_status()
1353 PHY_STATUS_SPLINE_LDO(DPIO_PHY1, DPIO_CH0, 1)); in assert_chv_phy_status()
1367 PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH0) | in assert_chv_phy_status()
1369 phy_status |= PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH0); in assert_chv_phy_status()
1382 PHY_CH_POWER_DOWN_OVRD(0x3, DPIO_PHY0, DPIO_CH0))) in assert_chv_phy_status()
1385 PHY_CH_POWER_DOWN_OVRD(0xc, DPIO_PHY0, DPIO_CH0))) in assert_chv_phy_status()
1405 phy_status |= PHY_STATUS_CMN_LDO(DPIO_PHY1, DPIO_CH0); in assert_chv_phy_status()
1545 if (ch == DPIO_CH0) in assert_chv_phy_powergate()
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H A Dintel_dpio_phy.c174 [DPIO_CH0] = { .port = PORT_B },
184 [DPIO_CH0] = { .port = PORT_A },
197 [DPIO_CH0] = { .port = PORT_B },
207 [DPIO_CH0] = { .port = PORT_A },
217 [DPIO_CH0] = { .port = PORT_C },
259 *ch = DPIO_CH0; in bxt_port_to_phy_channel()
274 *ch = DPIO_CH0; in bxt_port_to_phy_channel()
667 return DPIO_CH0; in vlv_dig_port_to_channel()
709 return DPIO_CH0; in vlv_pipe_to_channel()
889 if (ch == DPIO_CH0) in chv_phy_pre_pll_enable()
[all …]
H A Dintel_dpio_phy.h19 DPIO_CH0, enumerator
116 return DPIO_CH0; in vlv_dig_port_to_channel()
128 return DPIO_CH0; in vlv_pipe_to_channel()
H A Dintel_display_power.c1769 PHY_CH_POWER_MODE(PHY_CH_DEEP_PSR, DPIO_PHY0, DPIO_CH0) | in chv_phy_control_init()
1771 PHY_CH_POWER_MODE(PHY_CH_DEEP_PSR, DPIO_PHY1, DPIO_CH0); in chv_phy_control_init()
1789 PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY0, DPIO_CH0); in chv_phy_control_init()
1792 PHY_CH_POWER_DOWN_OVRD(mask, DPIO_PHY0, DPIO_CH0); in chv_phy_control_init()
1821 PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY1, DPIO_CH0); in chv_phy_control_init()
1824 PHY_CH_POWER_DOWN_OVRD(mask, DPIO_PHY1, DPIO_CH0); in chv_phy_control_init()
H A Dintel_dpll_mgr.c2047 enum dpio_channel ch = DPIO_CH0; in bxt_ddi_pll_enable()
/linux-6.15/drivers/gpu/drm/i915/gvt/
H A Dhandlers.c549 enum dpio_channel ch = DPIO_CH0; in bxt_vgpu_get_dp_bitrate()
557 ch = DPIO_CH0; in bxt_vgpu_get_dp_bitrate()
561 ch = DPIO_CH0; in bxt_vgpu_get_dp_bitrate()
2786 MMIO_DH(BXT_PORT_PCS_DW12_GRP(DPIO_PHY0, DPIO_CH0), D_BXT, in init_bxt_mmio_info()
2788 MMIO_DH(BXT_PORT_TX_DW3_LN(DPIO_PHY0, DPIO_CH0, 0), D_BXT, in init_bxt_mmio_info()
2794 MMIO_DH(BXT_PORT_PCS_DW12_GRP(DPIO_PHY1, DPIO_CH0), D_BXT, in init_bxt_mmio_info()
2796 MMIO_DH(BXT_PORT_TX_DW3_LN(DPIO_PHY1, DPIO_CH0, 0), D_BXT, in init_bxt_mmio_info()