Searched refs:DML2_MAX_DCN_PIPES (Results 1 – 5 of 5) sorted by relevance
322 bool unoptimizable_streams[DML2_MAX_DCN_PIPES];750 int per_pipe_viewport_x_start[DML2_MAX_PLANES][DML2_MAX_DCN_PIPES];751 int per_pipe_viewport_x_end[DML2_MAX_PLANES][DML2_MAX_DCN_PIPES];754 …struct dml2_display_mcache_regs *current_mcache_regs[DML2_MAX_PLANES][DML2_MAX_DCN_PIPES]; //One s…759 …struct dml2_display_mcache_regs mcache_regs[DML2_MAX_PLANES][DML2_MAX_DCN_PIPES]; //One set per pi…927 int pipe_vp_startx[DML2_MAX_DCN_PIPES];928 int pipe_vp_endx[DML2_MAX_DCN_PIPES];931 int pipe_vp_startx[DML2_MAX_DCN_PIPES];932 int pipe_vp_endx[DML2_MAX_DCN_PIPES];
11 #define DML2_MAX_DCN_PIPES 8 macro502 struct dml2_pipe_configuration_descriptor pipe_configurations[DML2_MAX_DCN_PIPES];
711 struct dml2_hubp_pipe_mcache_regs *per_plane_pipe_mcache_regs[DML2_MAX_PLANES][DML2_MAX_DCN_PIPES];714 struct dml2_hubp_pipe_mcache_regs mcache_regs_set[DML2_MAX_DCN_PIPES];
395 for (i = 0; i < DML2_MAX_DCN_PIPES; i++) { in map_min_clocks_to_dpm()622 for (i = 0; i < DML2_MAX_DCN_PIPES; i++) { in map_mode_to_soc_dpm()629 for (i = 0; i < DML2_MAX_DCN_PIPES; i++) { in map_mode_to_soc_dpm()650 for (i = 0; i < DML2_MAX_DCN_PIPES; i++) { in map_mode_to_soc_dpm()
1025 …memset(params->per_plane_pipe_mcache_regs, 0, DML2_MAX_PLANES * DML2_MAX_DCN_PIPES * sizeof(struct… in dml2_top_soc15_build_mcache_programming()