Searched refs:DMA_RESET (Results 1 – 12 of 12) sorted by relevance
| /linux-6.15/include/linux/ |
| H A D | rtsx_usb.h | 578 #define DMA_RESET 0x01 macro
617 rtsx_usb_ep0_write_register(ucr, MC_DMA_RST, DMA_RESET, DMA_RESET); in rtsx_usb_clear_dma_err()
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| /linux-6.15/include/dt-bindings/reset/ |
| H A D | altr,rst-mgr.h | 45 #define DMA_RESET 60 macro
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| H A D | altr,rst-mgr-s10.h | 35 #define DMA_RESET 48 macro
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| H A D | altr,rst-mgr-a10.h | 32 #define DMA_RESET 48 macro
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| /linux-6.15/arch/mips/lantiq/xway/ |
| H A D | dma.c | 40 #define DMA_RESET BIT(0) /* channel on / off bit */ macro
255 ltq_dma_w32_mask(0, DMA_RESET, LTQ_DMA_CTRL); in ltq_dma_init()
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| /linux-6.15/arch/m68k/include/asm/ |
| H A D | dvma.h | 230 #define DMA_RESET(dma) do { \ macro
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| /linux-6.15/arch/arm64/boot/dts/altera/ |
| H A D | socfpga_stratix10.dtsi | 376 resets = <&rst DMA_RESET>, <&rst DMA_OCP_RESET>;
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| /linux-6.15/drivers/comedi/drivers/ |
| H A D | ni_pcidio.c | 81 #define DMA_RESET BIT(6) macro
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| /linux-6.15/arch/arm64/boot/dts/intel/ |
| H A D | socfpga_agilex.dtsi | 372 resets = <&rst DMA_RESET>, <&rst DMA_OCP_RESET>;
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| /linux-6.15/arch/arm/boot/dts/intel/socfpga/ |
| H A D | socfpga_arria10.dtsi | 78 resets = <&rst DMA_RESET>, <&rst DMA_OCP_RESET>;
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| H A D | socfpga.dtsi | 85 resets = <&rst DMA_RESET>;
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| /linux-6.15/drivers/scsi/ |
| H A D | FlashPoint.c | 552 #define DMA_RESET BIT(3) macro
6414 WR_HARPOON(port + hp_scsireset, (DMA_RESET | HPSCSI_RESET | PROG_RESET | in FPT_XbowInit()
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