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Searched refs:DISP_CC_MDSS_RSCC_BCR (Results 1 – 21 of 21) sorted by relevance

/linux-6.15/include/dt-bindings/clock/
H A Dqcom,sm6375-dispcc.h37 #define DISP_CC_MDSS_RSCC_BCR 1 macro
H A Dqcom,sm4450-dispcc.h49 #define DISP_CC_MDSS_RSCC_BCR 2 macro
H A Dqcom,dispcc-sdm845.h51 #define DISP_CC_MDSS_RSCC_BCR 0 macro
H A Dqcom,dispcc-sm8150.h71 #define DISP_CC_MDSS_RSCC_BCR 1 macro
H A Dqcom,dispcc-sm8250.h71 #define DISP_CC_MDSS_RSCC_BCR 1 macro
H A Dqcom,dispcc-sm8350.h71 #define DISP_CC_MDSS_RSCC_BCR 1 macro
H A Dqcom,dispcc-sc8280xp.h94 #define DISP_CC_MDSS_RSCC_BCR 1 macro
H A Dqcom,x1e80100-dispcc.h92 #define DISP_CC_MDSS_RSCC_BCR 2 macro
H A Dqcom,sm8450-dispcc.h97 #define DISP_CC_MDSS_RSCC_BCR 2 macro
H A Dqcom,sm8650-dispcc.h95 #define DISP_CC_MDSS_RSCC_BCR 2 macro
H A Dqcom,sm8550-dispcc.h95 #define DISP_CC_MDSS_RSCC_BCR 2 macro
H A Dqcom,sm8750-dispcc.h106 #define DISP_CC_MDSS_RSCC_BCR 2 macro
/linux-6.15/drivers/clk/qcom/
H A Ddispcc-sm6375.c546 [DISP_CC_MDSS_RSCC_BCR] = { 0x2000 },
H A Ddispcc-sm4450.c713 [DISP_CC_MDSS_RSCC_BCR] = { 0xc000 },
H A Ddispcc-sdm845.c818 [DISP_CC_MDSS_RSCC_BCR] = { 0x5000 },
H A Ddispcc-sm8250.c1221 [DISP_CC_MDSS_RSCC_BCR] = { 0x4000 },
H A Ddispcc-x1e80100.c1622 [DISP_CC_MDSS_RSCC_BCR] = { 0xc000 },
H A Ddispcc-sm8550.c1732 [DISP_CC_MDSS_RSCC_BCR] = { 0xc000 },
H A Ddispcc-sm8450.c1766 [DISP_CC_MDSS_RSCC_BCR] = { 0xc000 },
H A Ddispcc-sm8750.c1872 [DISP_CC_MDSS_RSCC_BCR] = { 0xc000 },
H A Ddispcc-sc8280xp.c3047 [DISP_CC_MDSS_RSCC_BCR] = { 0x4000 },