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Searched refs:DISP (Results 1 – 14 of 14) sorted by relevance

/linux-6.15/Documentation/devicetree/bindings/soc/imx/
H A Dfsl,imx8mn-disp-blk-ctrl.yaml7 title: NXP i.MX8MN DISP blk-ctrl
13 The i.MX8MN DISP blk-ctrl is a top-level peripheral providing access to
15 peripherals located in the DISP domain of the SoC.
H A Dfsl,imx8mm-disp-blk-ctrl.yaml7 title: NXP i.MX8MM DISP blk-ctrl
13 The i.MX8MM DISP blk-ctrl is a top-level peripheral providing access to
15 peripherals located in the DISP domain of the SoC.
/linux-6.15/arch/mips/alchemy/common/
H A Dirq.c853 #define DISP(name, base, addr) \ macro
863 DISP(ic0r0, AU1000_INTC0_INT_BASE, AU1000_IC0_PHYS_ADDR + IC_REQ0INT)
864 DISP(ic0r1, AU1000_INTC0_INT_BASE, AU1000_IC0_PHYS_ADDR + IC_REQ1INT)
865 DISP(ic1r0, AU1000_INTC1_INT_BASE, AU1000_IC1_PHYS_ADDR + IC_REQ0INT)
866 DISP(ic1r1, AU1000_INTC1_INT_BASE, AU1000_IC1_PHYS_ADDR + IC_REQ1INT)
/linux-6.15/Documentation/devicetree/bindings/interconnect/
H A Dmediatek,mt8183-emi.yaml23 |DRAM |->|scheduler|----- |GPU | |--- |DISP|
/linux-6.15/Documentation/devicetree/bindings/clock/
H A Dqcom,sm6115-dispcc.yaml29 - description: GPLL0 DISP DIV clock from GCC
/linux-6.15/arch/arm64/boot/dts/exynos/
H A Dexynos5433-tm2e.dts22 * clocks properties for DISP CMU for each board to keep them together
H A Dexynos5433-tm2.dts22 * clocks properties for DISP CMU for each board to keep them together
H A Dexynos5433.dtsi704 label = "DISP";
/linux-6.15/Documentation/devicetree/bindings/display/samsung/
H A Dsamsung,exynos5433-mic.yaml48 Phandle to DISP system controller interface.
H A Dsamsung,exynos5433-decon.yaml82 Phandle to DISP system controller interface.
H A Dsamsung,exynos-hdmi.yaml74 Phandle to DISP system controller interface.
/linux-6.15/Documentation/devicetree/bindings/phy/
H A Dsamsung,mipi-video-phy.yaml54 Phandle to DISP system controller interface, valid for
/linux-6.15/drivers/pinctrl/renesas/
H A Dpfc-sh7786.c492 GPIO_FN(DISP),
/linux-6.15/arch/arm/boot/dts/samsung/
H A Dexynos5420.dtsi487 label = "DISP";