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Searched refs:DIDT_TD_CTRL0__PHASE_OFFSET__SHIFT (Results 1 – 11 of 11) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dsmu7_powertune.c187 … DIDT_TD_CTRL0__PHASE_OFFSET_MASK, DIDT_TD_CTRL0__PHASE_OFFSET__SHIFT, …
329 … DIDT_TD_CTRL0__PHASE_OFFSET_MASK, DIDT_TD_CTRL0__PHASE_OFFSET__SHIFT, …
471 … DIDT_TD_CTRL0__PHASE_OFFSET_MASK, DIDT_TD_CTRL0__PHASE_OFFSET__SHIFT, …
614 … DIDT_TD_CTRL0__PHASE_OFFSET_MASK, DIDT_TD_CTRL0__PHASE_OFFSET__SHIFT, …
796 … DIDT_TD_CTRL0__PHASE_OFFSET_MASK, DIDT_TD_CTRL0__PHASE_OFFSET__SHIFT, …
H A Dvega10_powertune.c218 …RL0, DIDT_TD_CTRL0__PHASE_OFFSET_MASK, DIDT_TD_CTRL0__PHASE_OFFSET__SHIFT, 0x…
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h18360 #define DIDT_TD_CTRL0__PHASE_OFFSET__SHIFT 0x2 macro
H A Dgfx_8_0_sh_mask.h20598 #define DIDT_TD_CTRL0__PHASE_OFFSET__SHIFT 0x2 macro
H A Dgfx_8_1_sh_mask.h21204 #define DIDT_TD_CTRL0__PHASE_OFFSET__SHIFT 0x2 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h29225 #define DIDT_TD_CTRL0__PHASE_OFFSET__SHIFT … macro
H A Dgc_9_1_sh_mask.h30432 #define DIDT_TD_CTRL0__PHASE_OFFSET__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h30705 #define DIDT_TD_CTRL0__PHASE_OFFSET__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h519 #define DIDT_TD_CTRL0__PHASE_OFFSET__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h43600 #define DIDT_TD_CTRL0__PHASE_OFFSET__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h48809 #define DIDT_TD_CTRL0__PHASE_OFFSET__SHIFT … macro