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Searched refs:DFH (Results 1 – 3 of 3) sorted by relevance

/linux-6.15/drivers/fpga/
H A Ddfl.h64 #define DFH 0x0 macro
123 #define FME_HDR_DFH DFH
164 #define PORT_HDR_DFH DFH
477 u64 v = readq(base + DFH); in dfl_feature_is_fme()
485 u64 v = readq(base + DFH); in dfl_feature_is_port()
493 return (u8)FIELD_GET(DFH_REVISION, readq(base + DFH)); in dfl_feature_revision()
H A Ddfl.c1310 v = readq(binfo->ioaddr + DFH); in parse_feature_fiu()
1363 v = readq(binfo->ioaddr + ofst + DFH); in parse_feature()
1404 v = readq(binfo->ioaddr + start - binfo->start + DFH); in parse_feature_list()
/linux-6.15/Documentation/fpga/
H A Ddfl.rst94 * Type - The type of DFH (e.g. FME, AFU, or private feature).
95 * DFH VER - The version of the DFH.
97 * EOL - Set if the DFH is the end of the Device Feature List (DFL).
98 * Next - The offset in bytes of the next DFH in the DFL from the DFH start,
99 and the start of a DFH must be aligned to an 8 byte boundary.
153 * Type - The type of DFH (e.g. FME, AFU, or private feature).
154 * DFH VER - The version of the DFH.
156 * EOL - Set if the DFH is the end of the Device Feature List (DFL).
157 * Next - The offset in bytes of the next DFH in the DFL from the DFH start,
158 and the start of a DFH must be aligned to an 8 byte boundary.
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