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Searched refs:DE (Results 1 – 25 of 46) sorted by relevance

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/linux-6.15/Documentation/devicetree/bindings/display/
H A Darm,malidp.yaml32 The interrupt used by the Display Engine (DE). Can be shared with
37 the interrupt for the Display Engine (DE), but it will have to be
42 - const: DE
107 interrupt-names = "DE", "SE";
H A Dallwinner,sun4i-a10-display-engine.yaml39 The same rule also applies to DE 2.0 mixer-TCON connections:
76 Available display engine frontends (DE 1.0) or mixers (DE
/linux-6.15/Documentation/admin-guide/media/
H A Dmgb4.rst79 pixel clock is running and the DE signal is moving.
157 valid pixel in the video line (marked by DE=1).
164 line (marked by DE=1) and assertion of the HSYNC signal.
171 line with the first valid pixel (marked by DE=1).
178 by DE=1) and assertion of the VSYNC signal.
253 DE signal polarity.
276 valid pixel in the video line (marked by DE=1). The default value is 50.
280 line (marked by DE=1) and assertion of the HSYNC signal. The default value
285 line with the first valid pixel (marked by DE=1). The default value is 31.
289 by DE=1) and assertion of the VSYNC signal. The default value is 30.
/linux-6.15/arch/arm/boot/dts/broadcom/
H A Dbcm47094-luxul-xap-1610.dts81 brcm,ccode-map = "AU-AU-920", "CA-CA-892", "GB-DE-964", "NZ-AU-920", "US-US-825";
99 brcm,ccode-map = "AU-AU-920", "CA-CA-892", "GB-DE-964", "NZ-AU-920", "US-US-825";
/linux-6.15/tools/perf/pmu-events/arch/x86/
H A Dmapfile.csv16 GenuineIntel-6-A[DE],v1.06,graniterapids,core
19 GenuineIntel-6-7[DE],v1.24,icelake,core
/linux-6.15/drivers/ata/
H A Dsata_fsl.c110 DE = 0x20, enumerator
562 ioread32(DE + hcr_base), in sata_fsl_qc_issue()
639 ioread32(CE + hcr_base), ioread32(DE + hcr_base)); in sata_fsl_freeze()
1081 hstatus, cereg, ioread32(hcr_base + DE), SError); in sata_fsl_error_intr()
1119 ioread32(hcr_base + CE), ioread32(hcr_base + DE)); in sata_fsl_error_intr()
1125 dereg = ioread32(hcr_base + DE); in sata_fsl_error_intr()
1126 iowrite32(dereg, hcr_base + DE); in sata_fsl_error_intr()
1147 dereg = ioread32(hcr_base + DE); in sata_fsl_error_intr()
1148 iowrite32(dereg, hcr_base + DE); in sata_fsl_error_intr()
1348 iowrite32(0x00000FFFF, hcr_base + DE); in sata_fsl_init_controller()
/linux-6.15/arch/arc/kernel/
H A Dtroubleshoot.c199 STS_BIT(regs, DE), STS_BIT(regs, AE), in show_regs()
206 STS_BIT(regs, DE), STS_BIT(regs, AE)); in show_regs()
/linux-6.15/Documentation/devicetree/bindings/arm/
H A Dsyna.txt19 "marvell,berlin2ct" for Marvell Armada ? (BG2CT, 88DE????)
21 "marvell,berlin3" for Marvell Armada ? (BG3, 88DE????)
/linux-6.15/arch/arm64/boot/dts/renesas/
H A Dr9a07g043u11-smarc-du-adv7513.dtso54 pinmux = <RZG2L_PORT_PINMUX(11, 1, 6)>; /* DE */
/linux-6.15/arch/arm64/boot/dts/freescale/
H A Dimx8mm-venice-gw72xx-0x-rs485.dtso9 * - UART4_TX is DE for RS485 transmitter
H A Dimx8mm-venice-gw73xx-0x-rs422.dtso9 * - UART4_TX is DE for RS485 transmitter
H A Dimx8mm-venice-gw73xx-0x-rs485.dtso9 * - UART4_TX is DE for RS485 transmitter
H A Dimx8mm-venice-gw72xx-0x-rs422.dtso9 * - UART4_TX is DE for RS485 transmitter
/linux-6.15/arch/arm/boot/dts/intel/socfpga/
H A Dsocfpga_cyclone5_de0_nano_soc.dts9 model = "Terasic DE-0(Atlas)";
/linux-6.15/Documentation/translations/sp_SP/
H A Dmemory-barriers.txt397 VARIEDADES DE BARRERA DE MEMORIA
599 BARRERA DE DEPENDENCIA DE DIRECCIÓN (HISTÓRICO)
719 DEPENDENCIAS DE CONTROL
1050 EJEMPLOS DE SECUENCIAS DE BARRERA DE MEMORIA
1322 BARRERAS DE MEMORIA DE LECTURA FRENTE A ESPECULACIÓN DE CARGA
1908 BARRERAS DE MEMORIA DE LA CPU
2078 FUNCIONES DE ADQUISICIÓN DE CERROJO
2231 FUNCIONES DE DESACTIVACIÓN DE INTERRUPCIONES
2763 MODELO DE ORDEN MÍNIMO DE EJECUCIÓN ASUMIDO
2795 EFECTOS DE LA MEMORIA CACHÉ DE LA CPU
[all …]
/linux-6.15/drivers/net/wireless/realtek/rtw88/
H A DKconfig127 tristate "Realtek 8723DE PCI wireless network adapter"
133 Select this option will enable support for 8723DE chipset
/linux-6.15/arch/arm/boot/dts/nxp/imx/
H A Dimx6ull-dhcom-drc02.dts56 * during TX anyway and that it only controls drive enable DE
H A Dimx6qdl-dhcom-drc02.dtsi27 * during TX anyway and that it only controls drive enable DE
/linux-6.15/arch/arm/mach-sa1100/
H A Dsleep.S130 @ Step 4 clear DE bis in MDCNFG
/linux-6.15/Documentation/translations/sp_SP/scheduler/
H A Dsched-design-CFS.rst41 2. UNOS CUANTOS DETALLES DE IMPLEMENTACIÓN
108 4. ALGUNAS CARACTERÍSTICAS DE CFS
165 6. CLASES DE GESTIÓN
227 7. EXTENSIONES DE GRUPOS PARA CFS
/linux-6.15/Documentation/networking/device_drivers/fddi/
H A Ddefza.rst20 standard STP-PMD using a DE-9F connector. This option can interface to
/linux-6.15/arch/arm/boot/dts/st/
H A Dstm32mp15xx-dhcom-drc02.dtsi21 * during TX anyway and that it only controls drive enable DE
/linux-6.15/Documentation/admin-guide/blockdev/
H A Dparide.rst74 friq Freecom IQ cable (DE)
75 frpw Freecom Power (DE)
/linux-6.15/drivers/eisa/
H A Deisa.ids453 DEL0005 "Dell Powerline(TM) Workstation 433DE(TM) System Board"
454 DEL0006 "Dell Powerline(TM) Workstation 420DE(TM) System Board"
455 DEL0007 "Dell Powerline(TM) Workstation 450DE(TM) System Board"
459 DEL000B "Dell PowerLine(TM) Workstation 425DE(TM) System Board"
463 DEL0021 "Dell Powerline(TM) Workstation 450DE/2(TM) System Board"
464 DEL0029 "Dell Powerline(TM) Workstation 466DE(TM) System Board"
465 DEL002A "Dell Powerline(TM) Workstation P60/DE(TM) System Board"
466 DEL002B "Dell Powerline(TM) Workstation P66/DE(TM) System Board"
619 ICU02A0 "D-Link DE-100"
620 ICU02B0 "D-Link DE-200"
/linux-6.15/arch/arm/boot/dts/nxp/vf/
H A Dvf610-zii-scu4-aib.dts865 VF610_PAD_PTB25__UART1_RTS 0x21a2 /* Used as DE signal for the RS-485 transceiver */
873 VF610_PAD_PTD2__UART2_RTS 0x21a2 /* Used as DE signal for the RS-485 transceiver */

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