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Searched refs:DCCG_GATE_DISABLE_CNTL2 (Results 1 – 25 of 28) sorted by relevance

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/linux-6.15/drivers/gpu/drm/amd/display/dc/dccg/dcn31/
H A Ddcn31_dccg.c458 REG_UPDATE(DCCG_GATE_DISABLE_CNTL2, in dccg31_set_physymclk()
465 REG_UPDATE(DCCG_GATE_DISABLE_CNTL2, in dccg31_set_physymclk()
475 REG_UPDATE(DCCG_GATE_DISABLE_CNTL2, in dccg31_set_physymclk()
482 REG_UPDATE(DCCG_GATE_DISABLE_CNTL2, in dccg31_set_physymclk()
492 REG_UPDATE(DCCG_GATE_DISABLE_CNTL2, in dccg31_set_physymclk()
499 REG_UPDATE(DCCG_GATE_DISABLE_CNTL2, in dccg31_set_physymclk()
509 REG_UPDATE(DCCG_GATE_DISABLE_CNTL2, in dccg31_set_physymclk()
516 REG_UPDATE(DCCG_GATE_DISABLE_CNTL2, in dccg31_set_physymclk()
526 REG_UPDATE(DCCG_GATE_DISABLE_CNTL2, in dccg31_set_physymclk()
533 REG_UPDATE(DCCG_GATE_DISABLE_CNTL2, in dccg31_set_physymclk()
H A Ddcn31_dccg.h67 SR(DCCG_GATE_DISABLE_CNTL2),\
145 DCCG_SF(DCCG_GATE_DISABLE_CNTL2, PHYASYMCLK_GATE_DISABLE, mask_sh),\
146 DCCG_SF(DCCG_GATE_DISABLE_CNTL2, PHYBSYMCLK_GATE_DISABLE, mask_sh),\
147 DCCG_SF(DCCG_GATE_DISABLE_CNTL2, PHYCSYMCLK_GATE_DISABLE, mask_sh),\
148 DCCG_SF(DCCG_GATE_DISABLE_CNTL2, PHYDSYMCLK_GATE_DISABLE, mask_sh),\
149 DCCG_SF(DCCG_GATE_DISABLE_CNTL2, PHYESYMCLK_GATE_DISABLE, mask_sh),\
/linux-6.15/drivers/gpu/drm/amd/display/dc/dccg/dcn314/
H A Ddcn314_dccg.h73 SR(DCCG_GATE_DISABLE_CNTL2),\
191 DCCG_SF(DCCG_GATE_DISABLE_CNTL2, PHYASYMCLK_GATE_DISABLE, mask_sh),\
192 DCCG_SF(DCCG_GATE_DISABLE_CNTL2, PHYBSYMCLK_GATE_DISABLE, mask_sh),\
193 DCCG_SF(DCCG_GATE_DISABLE_CNTL2, PHYCSYMCLK_GATE_DISABLE, mask_sh),\
194 DCCG_SF(DCCG_GATE_DISABLE_CNTL2, PHYDSYMCLK_GATE_DISABLE, mask_sh),\
195 DCCG_SF(DCCG_GATE_DISABLE_CNTL2, PHYESYMCLK_GATE_DISABLE, mask_sh),\
/linux-6.15/drivers/gpu/drm/amd/display/dc/dccg/dcn35/
H A Ddcn35_dccg.c240 REG_UPDATE(DCCG_GATE_DISABLE_CNTL2, in dccg35_set_physymclk_rcg()
244 REG_UPDATE(DCCG_GATE_DISABLE_CNTL2, in dccg35_set_physymclk_rcg()
248 REG_UPDATE(DCCG_GATE_DISABLE_CNTL2, in dccg35_set_physymclk_rcg()
252 REG_UPDATE(DCCG_GATE_DISABLE_CNTL2, in dccg35_set_physymclk_rcg()
256 REG_UPDATE(DCCG_GATE_DISABLE_CNTL2, in dccg35_set_physymclk_rcg()
277 REG_UPDATE(DCCG_GATE_DISABLE_CNTL2, in dccg35_set_symclk_fe_rcg()
283 REG_UPDATE(DCCG_GATE_DISABLE_CNTL2, in dccg35_set_symclk_fe_rcg()
289 REG_UPDATE(DCCG_GATE_DISABLE_CNTL2, in dccg35_set_symclk_fe_rcg()
295 REG_UPDATE(DCCG_GATE_DISABLE_CNTL2, in dccg35_set_symclk_fe_rcg()
301 REG_UPDATE(DCCG_GATE_DISABLE_CNTL2, in dccg35_set_symclk_fe_rcg()
[all …]
H A Ddcn35_dccg.h154 DCCG_SF(DCCG_GATE_DISABLE_CNTL2, PHYASYMCLK_ROOT_GATE_DISABLE, mask_sh),\
155 DCCG_SF(DCCG_GATE_DISABLE_CNTL2, PHYBSYMCLK_ROOT_GATE_DISABLE, mask_sh),\
156 DCCG_SF(DCCG_GATE_DISABLE_CNTL2, PHYCSYMCLK_ROOT_GATE_DISABLE, mask_sh),\
157 DCCG_SF(DCCG_GATE_DISABLE_CNTL2, PHYDSYMCLK_ROOT_GATE_DISABLE, mask_sh),\
158 DCCG_SF(DCCG_GATE_DISABLE_CNTL2, PHYESYMCLK_ROOT_GATE_DISABLE, mask_sh),\
197 DCCG_SF(DCCG_GATE_DISABLE_CNTL2, HDMICHARCLK0_GATE_DISABLE, mask_sh),\
/linux-6.15/drivers/gpu/drm/amd/display/dc/dccg/dcn401/
H A Ddcn401_dccg.c283 REG_UPDATE(DCCG_GATE_DISABLE_CNTL2, in dccg401_set_physymclk()
290 REG_UPDATE(DCCG_GATE_DISABLE_CNTL2, in dccg401_set_physymclk()
300 REG_UPDATE(DCCG_GATE_DISABLE_CNTL2, in dccg401_set_physymclk()
307 REG_UPDATE(DCCG_GATE_DISABLE_CNTL2, in dccg401_set_physymclk()
317 REG_UPDATE(DCCG_GATE_DISABLE_CNTL2, in dccg401_set_physymclk()
324 REG_UPDATE(DCCG_GATE_DISABLE_CNTL2, in dccg401_set_physymclk()
334 REG_UPDATE(DCCG_GATE_DISABLE_CNTL2, in dccg401_set_physymclk()
341 REG_UPDATE(DCCG_GATE_DISABLE_CNTL2, in dccg401_set_physymclk()
H A Ddcn401_dccg.h104 DCCG_SF(DCCG_GATE_DISABLE_CNTL2, PHYASYMCLK_ROOT_GATE_DISABLE, mask_sh),\
105 DCCG_SF(DCCG_GATE_DISABLE_CNTL2, PHYBSYMCLK_ROOT_GATE_DISABLE, mask_sh),\
106 DCCG_SF(DCCG_GATE_DISABLE_CNTL2, PHYCSYMCLK_ROOT_GATE_DISABLE, mask_sh),\
107 DCCG_SF(DCCG_GATE_DISABLE_CNTL2, PHYDSYMCLK_ROOT_GATE_DISABLE, mask_sh),\
128 DCCG_SF(DCCG_GATE_DISABLE_CNTL2, HDMICHARCLK0_GATE_DISABLE, mask_sh),\
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn35/
H A Ddcn35_resource.c617 HWS_SF(, DCCG_GATE_DISABLE_CNTL2, SYMCLKA_FE_GATE_DISABLE, mask_sh), \
618 HWS_SF(, DCCG_GATE_DISABLE_CNTL2, SYMCLKB_FE_GATE_DISABLE, mask_sh), \
619 HWS_SF(, DCCG_GATE_DISABLE_CNTL2, SYMCLKC_FE_GATE_DISABLE, mask_sh), \
620 HWS_SF(, DCCG_GATE_DISABLE_CNTL2, SYMCLKD_FE_GATE_DISABLE, mask_sh), \
621 HWS_SF(, DCCG_GATE_DISABLE_CNTL2, SYMCLKE_FE_GATE_DISABLE, mask_sh), \
622 HWS_SF(, DCCG_GATE_DISABLE_CNTL2, HDMICHARCLK0_GATE_DISABLE, mask_sh), \
623 HWS_SF(, DCCG_GATE_DISABLE_CNTL2, SYMCLKA_GATE_DISABLE, mask_sh), \
624 HWS_SF(, DCCG_GATE_DISABLE_CNTL2, SYMCLKB_GATE_DISABLE, mask_sh), \
625 HWS_SF(, DCCG_GATE_DISABLE_CNTL2, SYMCLKC_GATE_DISABLE, mask_sh), \
626 HWS_SF(, DCCG_GATE_DISABLE_CNTL2, SYMCLKD_GATE_DISABLE, mask_sh), \
[all …]
H A Ddcn35_resource.h169 SR(DCCG_GATE_DISABLE_CNTL2), \
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn36/
H A Ddcn36_resource.c598 HWS_SF(, DCCG_GATE_DISABLE_CNTL2, SYMCLKA_FE_GATE_DISABLE, mask_sh), \
599 HWS_SF(, DCCG_GATE_DISABLE_CNTL2, SYMCLKB_FE_GATE_DISABLE, mask_sh), \
600 HWS_SF(, DCCG_GATE_DISABLE_CNTL2, SYMCLKC_FE_GATE_DISABLE, mask_sh), \
601 HWS_SF(, DCCG_GATE_DISABLE_CNTL2, SYMCLKD_FE_GATE_DISABLE, mask_sh), \
602 HWS_SF(, DCCG_GATE_DISABLE_CNTL2, SYMCLKE_FE_GATE_DISABLE, mask_sh), \
603 HWS_SF(, DCCG_GATE_DISABLE_CNTL2, HDMICHARCLK0_GATE_DISABLE, mask_sh), \
604 HWS_SF(, DCCG_GATE_DISABLE_CNTL2, SYMCLKA_GATE_DISABLE, mask_sh), \
605 HWS_SF(, DCCG_GATE_DISABLE_CNTL2, SYMCLKB_GATE_DISABLE, mask_sh), \
606 HWS_SF(, DCCG_GATE_DISABLE_CNTL2, SYMCLKC_GATE_DISABLE, mask_sh), \
607 HWS_SF(, DCCG_GATE_DISABLE_CNTL2, SYMCLKD_GATE_DISABLE, mask_sh), \
[all …]
H A Ddcn36_resource.h30 SR(DCCG_GATE_DISABLE_CNTL2), \
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn351/
H A Ddcn351_resource.c597 HWS_SF(, DCCG_GATE_DISABLE_CNTL2, SYMCLKA_FE_GATE_DISABLE, mask_sh), \
598 HWS_SF(, DCCG_GATE_DISABLE_CNTL2, SYMCLKB_FE_GATE_DISABLE, mask_sh), \
599 HWS_SF(, DCCG_GATE_DISABLE_CNTL2, SYMCLKC_FE_GATE_DISABLE, mask_sh), \
600 HWS_SF(, DCCG_GATE_DISABLE_CNTL2, SYMCLKD_FE_GATE_DISABLE, mask_sh), \
601 HWS_SF(, DCCG_GATE_DISABLE_CNTL2, SYMCLKE_FE_GATE_DISABLE, mask_sh), \
602 HWS_SF(, DCCG_GATE_DISABLE_CNTL2, HDMICHARCLK0_GATE_DISABLE, mask_sh), \
603 HWS_SF(, DCCG_GATE_DISABLE_CNTL2, SYMCLKA_GATE_DISABLE, mask_sh), \
604 HWS_SF(, DCCG_GATE_DISABLE_CNTL2, SYMCLKB_GATE_DISABLE, mask_sh), \
605 HWS_SF(, DCCG_GATE_DISABLE_CNTL2, SYMCLKC_GATE_DISABLE, mask_sh), \
606 HWS_SF(, DCCG_GATE_DISABLE_CNTL2, SYMCLKD_GATE_DISABLE, mask_sh), \
[all …]
/linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/dce/
H A Ddce_hwseq.h199 SR(DCCG_GATE_DISABLE_CNTL2), \
424 SR(DCCG_GATE_DISABLE_CNTL2), \
636 uint32_t DCCG_GATE_DISABLE_CNTL2; member
/linux-6.15/drivers/gpu/drm/amd/display/dc/dccg/dcn20/
H A Ddcn20_dccg.h412 uint32_t DCCG_GATE_DISABLE_CNTL2; \
/linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/dcn201/
H A Ddcn201_hwseq.c368 REG_WRITE(DCCG_GATE_DISABLE_CNTL2, 0); in dcn201_init_hw()
/linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/dcn31/
H A Ddcn31_hwseq.c253 REG_WRITE(DCCG_GATE_DISABLE_CNTL2, 0); in dcn31_init_hw()
/linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/dcn30/
H A Ddcn30_hwseq.c791 REG_WRITE(DCCG_GATE_DISABLE_CNTL2, 0); in dcn30_init_hw()
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn401/
H A Ddcn401_resource.h644 SR(DCCG_GATE_DISABLE_CNTL2),\
H A Ddcn401_resource.c513 SR(DCCG_GATE_DISABLE_CNTL2), \
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn316/
H A Ddcn316_resource.c680 SR(DCCG_GATE_DISABLE_CNTL2), \
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn314/
H A Ddcn314_resource.c693 SR(DCCG_GATE_DISABLE_CNTL2), \
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn315/
H A Ddcn315_resource.c685 SR(DCCG_GATE_DISABLE_CNTL2), \
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn31/
H A Ddcn31_resource.c686 SR(DCCG_GATE_DISABLE_CNTL2), \
/linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/dcn32/
H A Ddcn32_hwseq.c958 REG_WRITE(DCCG_GATE_DISABLE_CNTL2, 0); in dcn32_init_hw()
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn321/
H A Ddcn321_resource.c533 SR(DCCG_GATE_DISABLE_CNTL2), \

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