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Searched refs:DB_DEBUG2__DTR_PREZ_STALLS_FOR_ETF_ROOM_MASK (Results 1 – 15 of 15) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h3280 #define DB_DEBUG2__DTR_PREZ_STALLS_FOR_ETF_ROOM_MASK 0x00000010L macro
H A Dgfx_7_2_sh_mask.h3911 #define DB_DEBUG2__DTR_PREZ_STALLS_FOR_ETF_ROOM_MASK 0x10 macro
H A Dgfx_8_0_sh_mask.h4637 #define DB_DEBUG2__DTR_PREZ_STALLS_FOR_ETF_ROOM_MASK 0x10 macro
H A Dgfx_8_1_sh_mask.h5161 #define DB_DEBUG2__DTR_PREZ_STALLS_FOR_ETF_ROOM_MASK 0x10 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h5015 #define DB_DEBUG2__DTR_PREZ_STALLS_FOR_ETF_ROOM_MASK … macro
H A Dgc_9_1_sh_mask.h4487 #define DB_DEBUG2__DTR_PREZ_STALLS_FOR_ETF_ROOM_MASK … macro
H A Dgc_9_2_1_sh_mask.h4314 #define DB_DEBUG2__DTR_PREZ_STALLS_FOR_ETF_ROOM_MASK … macro
H A Dgc_9_4_3_sh_mask.h5513 #define DB_DEBUG2__DTR_PREZ_STALLS_FOR_ETF_ROOM_MASK … macro
H A Dgc_9_4_2_sh_mask.h20407 #define DB_DEBUG2__DTR_PREZ_STALLS_FOR_ETF_ROOM_MASK … macro
H A Dgc_11_5_0_sh_mask.h5070 #define DB_DEBUG2__DTR_PREZ_STALLS_FOR_ETF_ROOM_MASK … macro
H A Dgc_11_0_0_sh_mask.h7943 #define DB_DEBUG2__DTR_PREZ_STALLS_FOR_ETF_ROOM_MASK … macro
H A Dgc_12_0_0_sh_mask.h25379 #define DB_DEBUG2__DTR_PREZ_STALLS_FOR_ETF_ROOM_MASK … macro
H A Dgc_10_1_0_sh_mask.h9301 #define DB_DEBUG2__DTR_PREZ_STALLS_FOR_ETF_ROOM_MASK … macro
H A Dgc_11_0_3_sh_mask.h9549 #define DB_DEBUG2__DTR_PREZ_STALLS_FOR_ETF_ROOM_MASK … macro
H A Dgc_10_3_0_sh_mask.h9481 #define DB_DEBUG2__DTR_PREZ_STALLS_FOR_ETF_ROOM_MASK … macro