Searched refs:DAVINCI_MMCCLK (Results 1 – 1 of 1) sorted by relevance
32 #define DAVINCI_MMCCLK 0x04 /* Memory Clock Control Register */ macro648 temp = readl(host->base + DAVINCI_MMCCLK) & ~MMCCLK_CLKRT_MASK; in calculate_clk_divider()650 writel(temp, host->base + DAVINCI_MMCCLK); in calculate_clk_divider()661 temp = readl(host->base + DAVINCI_MMCCLK) & ~MMCCLK_CLKEN; in calculate_clk_divider()662 writel(temp, host->base + DAVINCI_MMCCLK); in calculate_clk_divider()666 temp = readl(host->base + DAVINCI_MMCCLK) & ~MMCCLK_CLKRT_MASK; in calculate_clk_divider()668 writel(temp, host->base + DAVINCI_MMCCLK); in calculate_clk_divider()670 writel(temp | MMCCLK_CLKEN, host->base + DAVINCI_MMCCLK); in calculate_clk_divider()1106 writel(0, host->base + DAVINCI_MMCCLK); in init_mmcsd_host()1107 writel(MMCCLK_CLKEN, host->base + DAVINCI_MMCCLK); in init_mmcsd_host()