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Searched refs:D1VGA_CONTROL (Results 1 – 18 of 18) sorted by relevance

/linux-6.15/drivers/gpu/drm/radeon/
H A Davivod.h44 #define D1VGA_CONTROL 0x0330 macro
/linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/dce/
H A Ddce_hwseq.h249 SR(D1VGA_CONTROL), \
313 SR(D1VGA_CONTROL), \
363 SR(D1VGA_CONTROL), \
471 SR(D1VGA_CONTROL), \
531 SR(D1VGA_CONTROL), \
561 SR(D1VGA_CONTROL), \
659 uint32_t D1VGA_CONTROL; member
832 HWS_SF(, D1VGA_CONTROL, D1VGA_MODE_ENABLE, mask_sh),\
/linux-6.15/drivers/gpu/drm/amd/display/dc/dce120/
H A Ddce120_timing_generator.c418 set_reg_field_value(value, 0, D1VGA_CONTROL, D1VGA_MODE_ENABLE); in dce120_timing_generator_disable_vga()
419 set_reg_field_value(value, 0, D1VGA_CONTROL, D1VGA_TIMING_SELECT); in dce120_timing_generator_disable_vga()
421 value, 0, D1VGA_CONTROL, D1VGA_SYNC_POLARITY_SELECT); in dce120_timing_generator_disable_vga()
422 set_reg_field_value(value, 0, D1VGA_CONTROL, D1VGA_OVERSCAN_COLOR_EN); in dce120_timing_generator_disable_vga()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dce110/
H A Ddce110_timing_generator.c1829 set_reg_field_value(value, 0, D1VGA_CONTROL, D1VGA_MODE_ENABLE); in dce110_timing_generator_disable_vga()
1830 set_reg_field_value(value, 0, D1VGA_CONTROL, D1VGA_TIMING_SELECT); in dce110_timing_generator_disable_vga()
1832 value, 0, D1VGA_CONTROL, D1VGA_SYNC_POLARITY_SELECT); in dce110_timing_generator_disable_vga()
1833 set_reg_field_value(value, 0, D1VGA_CONTROL, D1VGA_OVERSCAN_COLOR_EN); in dce110_timing_generator_disable_vga()
/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dgmc_v11_0.c515 if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) { in gmc_v11_0_get_vbios_fb_size()
H A Dgmc_v10_0.c551 if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) { in gmc_v10_0_get_vbios_fb_size()
H A Dgmc_v6_0.c802 if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) { in gmc_v6_0_get_vbios_fb_size()
H A Dgmc_v7_0.c969 if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) { in gmc_v7_0_get_vbios_fb_size()
H A Dgmc_v8_0.c1075 if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) { in gmc_v8_0_get_vbios_fb_size()
H A Dgmc_v9_0.c1356 if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) { in gmc_v9_0_get_vbios_fb_size()
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn316/
H A Ddcn316_resource.c718 SR(D1VGA_CONTROL), \
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn314/
H A Ddcn314_resource.c733 SR(D1VGA_CONTROL), \
/linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/dcn10/
H A Ddcn10_hwseq.c644 REG_GET(D1VGA_CONTROL, D1VGA_MODE_ENABLE, &in_vga1_mode); in dcn10_disable_vga()
653 REG_WRITE(D1VGA_CONTROL, 0); in dcn10_disable_vga()
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn315/
H A Ddcn315_resource.c723 SR(D1VGA_CONTROL), \
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn31/
H A Ddcn31_resource.c724 SR(D1VGA_CONTROL), \
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn321/
H A Ddcn321_resource.c573 SR(D1VGA_CONTROL), \
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource.c576 SR(D1VGA_CONTROL), \
/linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/dcn20/
H A Ddcn20_hwseq.c375 REG_WRITE(D1VGA_CONTROL, 0); in dcn20_disable_vga()