Searched refs:CTL0 (Results 1 – 3 of 3) sorted by relevance
| /linux-6.15/drivers/dma/ |
| H A D | pch_dma.c | 205 val = dma_readl(pd, CTL0); in pdc_set_dir()
220 dma_writel(pd, CTL0, val); in pdc_set_dir()
256 val = dma_readl(pd, CTL0); in pdc_set_mode()
260 dma_writel(pd, CTL0, val); in pdc_set_mode()
739 pd->regs.dma_ctl0 = dma_readl(pd, CTL0); in pch_dma_save_regs()
762 dma_writel(pd, CTL0, pd->regs.dma_ctl0); in pch_dma_restore_regs()
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| /linux-6.15/Documentation/devicetree/bindings/display/ |
| H A D | lvds-data-mapping.yaml | 108 CTL0: HSync
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| /linux-6.15/drivers/soc/mediatek/ |
| H A D | mtk-svs.c | 264 CTL0, enumerator
322 [CTL0] = 0x88,
1249 svs_writel_relaxed(svsp, bdata->ctl0, CTL0); in svs_set_bank_phase()
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