Searched refs:CRTC1_REGISTER_OFFSET (Results 1 – 7 of 7) sorted by relevance
34 #define CRTC1_REGISTER_OFFSET (0x1d9c - 0x1b9c) macro
40 #define CRTC1_REGISTER_OFFSET (0x1e7c - 0x1b7c) macro
59 CRTC1_REGISTER_OFFSET,77 CRTC1_REGISTER_OFFSET,2938 reg_block = CRTC1_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state()2989 reg_block = CRTC1_REGISTER_OFFSET; in dce_v8_0_set_crtc_vline_interrupt_state()
70 CRTC1_REGISTER_OFFSET,89 CRTC1_REGISTER_OFFSET,2967 reg_block = CRTC1_REGISTER_OFFSET; in dce_v6_0_set_crtc_vblank_interrupt_state()
1704 #define CRTC1_REGISTER_OFFSET (0x1e7c - 0x1b7c) //(0x79f0 - 0x6df0)/4 macro
59 CRTC1_REGISTER_OFFSET,2742 amdgpu_crtc->crtc_offset = CRTC1_REGISTER_OFFSET; in dce_v10_0_crtc_init()
60 CRTC1_REGISTER_OFFSET,2855 amdgpu_crtc->crtc_offset = CRTC1_REGISTER_OFFSET; in dce_v11_0_crtc_init()