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Searched refs:CP_MEC_CNTL__MEC_INVALIDATE_ICACHE_MASK (Results 1 – 16 of 16) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_4_3.c1689 (CP_MEC_CNTL__MEC_INVALIDATE_ICACHE_MASK | in gfx_v9_4_3_xcc_cp_compute_enable()
H A Dgfx_v9_0.c3439 (CP_MEC_CNTL__MEC_INVALIDATE_ICACHE_MASK | in gfx_v9_0_cp_compute_enable()
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h2219 #define CP_MEC_CNTL__MEC_INVALIDATE_ICACHE_MASK 0x10 macro
H A Dgfx_8_0_sh_mask.h2753 #define CP_MEC_CNTL__MEC_INVALIDATE_ICACHE_MASK 0x10 macro
H A Dgfx_8_1_sh_mask.h3275 #define CP_MEC_CNTL__MEC_INVALIDATE_ICACHE_MASK 0x10 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h839 #define CP_MEC_CNTL__MEC_INVALIDATE_ICACHE_MASK … macro
H A Dgc_9_1_sh_mask.h738 #define CP_MEC_CNTL__MEC_INVALIDATE_ICACHE_MASK … macro
H A Dgc_9_2_1_sh_mask.h727 #define CP_MEC_CNTL__MEC_INVALIDATE_ICACHE_MASK … macro
H A Dgc_9_4_3_sh_mask.h777 #define CP_MEC_CNTL__MEC_INVALIDATE_ICACHE_MASK … macro
H A Dgc_9_4_2_sh_mask.h1360 #define CP_MEC_CNTL__MEC_INVALIDATE_ICACHE_MASK … macro
H A Dgc_11_5_0_sh_mask.h20036 #define CP_MEC_CNTL__MEC_INVALIDATE_ICACHE_MASK … macro
H A Dgc_11_0_0_sh_mask.h23997 #define CP_MEC_CNTL__MEC_INVALIDATE_ICACHE_MASK … macro
H A Dgc_12_0_0_sh_mask.h13849 #define CP_MEC_CNTL__MEC_INVALIDATE_ICACHE_MASK … macro
H A Dgc_10_1_0_sh_mask.h6324 #define CP_MEC_CNTL__MEC_INVALIDATE_ICACHE_MASK … macro
H A Dgc_11_0_3_sh_mask.h26343 #define CP_MEC_CNTL__MEC_INVALIDATE_ICACHE_MASK … macro
H A Dgc_10_3_0_sh_mask.h6897 #define CP_MEC_CNTL__MEC_INVALIDATE_ICACHE_MASK … macro