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Searched refs:CP_MEC2_INTR_ROUTINE_START__IR_START_MASK (Results 1 – 13 of 13) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h1939 #define CP_MEC2_INTR_ROUTINE_START__IR_START_MASK 0xfff macro
H A Dgfx_8_0_sh_mask.h2449 #define CP_MEC2_INTR_ROUTINE_START__IR_START_MASK 0xffff macro
H A Dgfx_8_1_sh_mask.h2971 #define CP_MEC2_INTR_ROUTINE_START__IR_START_MASK 0xffff macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h11832 #define CP_MEC2_INTR_ROUTINE_START__IR_START_MASK … macro
H A Dgc_9_1_sh_mask.h13258 #define CP_MEC2_INTR_ROUTINE_START__IR_START_MASK … macro
H A Dgc_9_2_1_sh_mask.h13036 #define CP_MEC2_INTR_ROUTINE_START__IR_START_MASK … macro
H A Dgc_9_4_3_sh_mask.h15041 #define CP_MEC2_INTR_ROUTINE_START__IR_START_MASK … macro
H A Dgc_9_4_2_sh_mask.h3234 #define CP_MEC2_INTR_ROUTINE_START__IR_START_MASK … macro
H A Dgc_11_5_0_sh_mask.h12959 #define CP_MEC2_INTR_ROUTINE_START__IR_START_MASK … macro
H A Dgc_11_0_0_sh_mask.h16265 #define CP_MEC2_INTR_ROUTINE_START__IR_START_MASK … macro
H A Dgc_10_1_0_sh_mask.h18808 #define CP_MEC2_INTR_ROUTINE_START__IR_START_MASK … macro
H A Dgc_11_0_3_sh_mask.h18508 #define CP_MEC2_INTR_ROUTINE_START__IR_START_MASK … macro
H A Dgc_10_3_0_sh_mask.h17156 #define CP_MEC2_INTR_ROUTINE_START__IR_START_MASK … macro