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Searched refs:CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE__SHIFT (Results 1 – 15 of 15) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2383 #define CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE__SHIFT 0x0000001a macro
H A Dgfx_7_2_sh_mask.h1186 #define CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE__SHIFT 0x1a macro
H A Dgfx_8_0_sh_mask.h1514 #define CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE__SHIFT 0x1a macro
H A Dgfx_8_1_sh_mask.h2038 #define CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE__SHIFT 0x1a macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h10996 #define CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE__SHIFT … macro
H A Dgc_9_1_sh_mask.h12473 #define CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h12277 #define CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h14004 #define CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h2293 #define CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE__SHIFT … macro
H A Dgc_11_5_0_sh_mask.h12219 #define CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h15403 #define CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE__SHIFT … macro
H A Dgc_12_0_0_sh_mask.h11839 #define CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h17934 #define CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h17558 #define CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h16198 #define CP_INT_CNTL_RING0__TIME_STAMP_INT_ENABLE__SHIFT … macro