Home
last modified time | relevance | path

Searched refs:CP_INT_CNTL_RING0__GFX_IDLE_INT_ENABLE_MASK (Results 1 – 13 of 13) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h1505 #define CP_INT_CNTL_RING0__GFX_IDLE_INT_ENABLE_MASK 0x200000 macro
H A Dgfx_8_1_sh_mask.h2029 #define CP_INT_CNTL_RING0__GFX_IDLE_INT_ENABLE_MASK 0x200000 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h11008 #define CP_INT_CNTL_RING0__GFX_IDLE_INT_ENABLE_MASK … macro
H A Dgc_9_1_sh_mask.h12485 #define CP_INT_CNTL_RING0__GFX_IDLE_INT_ENABLE_MASK … macro
H A Dgc_9_2_1_sh_mask.h12289 #define CP_INT_CNTL_RING0__GFX_IDLE_INT_ENABLE_MASK … macro
H A Dgc_9_4_3_sh_mask.h14016 #define CP_INT_CNTL_RING0__GFX_IDLE_INT_ENABLE_MASK … macro
H A Dgc_9_4_2_sh_mask.h2305 #define CP_INT_CNTL_RING0__GFX_IDLE_INT_ENABLE_MASK … macro
H A Dgc_11_5_0_sh_mask.h12234 #define CP_INT_CNTL_RING0__GFX_IDLE_INT_ENABLE_MASK … macro
H A Dgc_11_0_0_sh_mask.h15418 #define CP_INT_CNTL_RING0__GFX_IDLE_INT_ENABLE_MASK … macro
H A Dgc_12_0_0_sh_mask.h11854 #define CP_INT_CNTL_RING0__GFX_IDLE_INT_ENABLE_MASK … macro
H A Dgc_10_1_0_sh_mask.h17949 #define CP_INT_CNTL_RING0__GFX_IDLE_INT_ENABLE_MASK … macro
H A Dgc_11_0_3_sh_mask.h17573 #define CP_INT_CNTL_RING0__GFX_IDLE_INT_ENABLE_MASK … macro
H A Dgc_10_3_0_sh_mask.h16213 #define CP_INT_CNTL_RING0__GFX_IDLE_INT_ENABLE_MASK … macro