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Searched refs:CP_INT_CNTL_RING0__CNTX_EMPTY_INT_ENABLE_MASK (Results 1 – 16 of 16) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v7_0.c3066 CP_INT_CNTL_RING0__CNTX_EMPTY_INT_ENABLE_MASK); in gfx_v7_0_enable_gui_idle_interrupt()
3069 CP_INT_CNTL_RING0__CNTX_EMPTY_INT_ENABLE_MASK); in gfx_v7_0_enable_gui_idle_interrupt()
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2364 #define CP_INT_CNTL_RING0__CNTX_EMPTY_INT_ENABLE_MASK 0x00100000L macro
H A Dgfx_7_2_sh_mask.h1177 #define CP_INT_CNTL_RING0__CNTX_EMPTY_INT_ENABLE_MASK 0x100000 macro
H A Dgfx_8_0_sh_mask.h1503 #define CP_INT_CNTL_RING0__CNTX_EMPTY_INT_ENABLE_MASK 0x100000 macro
H A Dgfx_8_1_sh_mask.h2027 #define CP_INT_CNTL_RING0__CNTX_EMPTY_INT_ENABLE_MASK 0x100000 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h11007 #define CP_INT_CNTL_RING0__CNTX_EMPTY_INT_ENABLE_MASK … macro
H A Dgc_9_1_sh_mask.h12484 #define CP_INT_CNTL_RING0__CNTX_EMPTY_INT_ENABLE_MASK … macro
H A Dgc_9_2_1_sh_mask.h12288 #define CP_INT_CNTL_RING0__CNTX_EMPTY_INT_ENABLE_MASK … macro
H A Dgc_9_4_3_sh_mask.h14015 #define CP_INT_CNTL_RING0__CNTX_EMPTY_INT_ENABLE_MASK … macro
H A Dgc_9_4_2_sh_mask.h2304 #define CP_INT_CNTL_RING0__CNTX_EMPTY_INT_ENABLE_MASK … macro
H A Dgc_11_5_0_sh_mask.h12233 #define CP_INT_CNTL_RING0__CNTX_EMPTY_INT_ENABLE_MASK … macro
H A Dgc_11_0_0_sh_mask.h15417 #define CP_INT_CNTL_RING0__CNTX_EMPTY_INT_ENABLE_MASK … macro
H A Dgc_12_0_0_sh_mask.h11853 #define CP_INT_CNTL_RING0__CNTX_EMPTY_INT_ENABLE_MASK … macro
H A Dgc_10_1_0_sh_mask.h17948 #define CP_INT_CNTL_RING0__CNTX_EMPTY_INT_ENABLE_MASK … macro
H A Dgc_11_0_3_sh_mask.h17572 #define CP_INT_CNTL_RING0__CNTX_EMPTY_INT_ENABLE_MASK … macro
H A Dgc_10_3_0_sh_mask.h16212 #define CP_INT_CNTL_RING0__CNTX_EMPTY_INT_ENABLE_MASK … macro