Home
last modified time | relevance | path

Searched refs:CP_HQD_PQ_BASE__ADDR_MASK (Results 1 – 14 of 14) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h3313 #define CP_HQD_PQ_BASE__ADDR_MASK 0xffffffff macro
H A Dgfx_8_0_sh_mask.h3921 #define CP_HQD_PQ_BASE__ADDR_MASK 0xffffffff macro
H A Dgfx_8_1_sh_mask.h4443 #define CP_HQD_PQ_BASE__ADDR_MASK 0xffffffff macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12855 #define CP_HQD_PQ_BASE__ADDR_MASK macro
H A Dgc_9_1_sh_mask.h14155 #define CP_HQD_PQ_BASE__ADDR_MASK macro
H A Dgc_9_2_1_sh_mask.h14020 #define CP_HQD_PQ_BASE__ADDR_MASK macro
H A Dgc_9_4_3_sh_mask.h16385 #define CP_HQD_PQ_BASE__ADDR_MASK macro
H A Dgc_9_4_2_sh_mask.h3951 #define CP_HQD_PQ_BASE__ADDR_MASK macro
H A Dgc_11_5_0_sh_mask.h14026 #define CP_HQD_PQ_BASE__ADDR_MASK macro
H A Dgc_11_0_0_sh_mask.h17332 #define CP_HQD_PQ_BASE__ADDR_MASK macro
H A Dgc_12_0_0_sh_mask.h13232 #define CP_HQD_PQ_BASE__ADDR_MASK macro
H A Dgc_10_1_0_sh_mask.h20266 #define CP_HQD_PQ_BASE__ADDR_MASK macro
H A Dgc_11_0_3_sh_mask.h19571 #define CP_HQD_PQ_BASE__ADDR_MASK macro
H A Dgc_10_3_0_sh_mask.h18421 #define CP_HQD_PQ_BASE__ADDR_MASK macro