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Searched refs:CP_HQD_IQ_TIMER__PROCESS_IQ_EN__SHIFT (Results 1 – 14 of 14) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h3396 #define CP_HQD_IQ_TIMER__PROCESS_IQ_EN__SHIFT 0x1d macro
H A Dgfx_8_0_sh_mask.h4018 #define CP_HQD_IQ_TIMER__PROCESS_IQ_EN__SHIFT 0x1d macro
H A Dgfx_8_1_sh_mask.h4540 #define CP_HQD_IQ_TIMER__PROCESS_IQ_EN__SHIFT 0x1d macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12956 #define CP_HQD_IQ_TIMER__PROCESS_IQ_EN__SHIFT … macro
H A Dgc_9_1_sh_mask.h14256 #define CP_HQD_IQ_TIMER__PROCESS_IQ_EN__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h14121 #define CP_HQD_IQ_TIMER__PROCESS_IQ_EN__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h16490 #define CP_HQD_IQ_TIMER__PROCESS_IQ_EN__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h4054 #define CP_HQD_IQ_TIMER__PROCESS_IQ_EN__SHIFT … macro
H A Dgc_11_5_0_sh_mask.h14130 #define CP_HQD_IQ_TIMER__PROCESS_IQ_EN__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h17436 #define CP_HQD_IQ_TIMER__PROCESS_IQ_EN__SHIFT … macro
H A Dgc_12_0_0_sh_mask.h13333 #define CP_HQD_IQ_TIMER__PROCESS_IQ_EN__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h20370 #define CP_HQD_IQ_TIMER__PROCESS_IQ_EN__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h19677 #define CP_HQD_IQ_TIMER__PROCESS_IQ_EN__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h18523 #define CP_HQD_IQ_TIMER__PROCESS_IQ_EN__SHIFT … macro