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Searched refs:CP_HQD_IQ_TIMER__PROCESS_IQ_EN_MASK (Results 1 – 14 of 14) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h3395 #define CP_HQD_IQ_TIMER__PROCESS_IQ_EN_MASK 0x20000000 macro
H A Dgfx_8_0_sh_mask.h4017 #define CP_HQD_IQ_TIMER__PROCESS_IQ_EN_MASK 0x20000000 macro
H A Dgfx_8_1_sh_mask.h4539 #define CP_HQD_IQ_TIMER__PROCESS_IQ_EN_MASK 0x20000000 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12970 #define CP_HQD_IQ_TIMER__PROCESS_IQ_EN_MASK … macro
H A Dgc_9_1_sh_mask.h14270 #define CP_HQD_IQ_TIMER__PROCESS_IQ_EN_MASK … macro
H A Dgc_9_2_1_sh_mask.h14135 #define CP_HQD_IQ_TIMER__PROCESS_IQ_EN_MASK … macro
H A Dgc_9_4_3_sh_mask.h16504 #define CP_HQD_IQ_TIMER__PROCESS_IQ_EN_MASK … macro
H A Dgc_9_4_2_sh_mask.h4068 #define CP_HQD_IQ_TIMER__PROCESS_IQ_EN_MASK … macro
H A Dgc_11_5_0_sh_mask.h14145 #define CP_HQD_IQ_TIMER__PROCESS_IQ_EN_MASK … macro
H A Dgc_11_0_0_sh_mask.h17451 #define CP_HQD_IQ_TIMER__PROCESS_IQ_EN_MASK … macro
H A Dgc_12_0_0_sh_mask.h13347 #define CP_HQD_IQ_TIMER__PROCESS_IQ_EN_MASK … macro
H A Dgc_10_1_0_sh_mask.h20385 #define CP_HQD_IQ_TIMER__PROCESS_IQ_EN_MASK … macro
H A Dgc_11_0_3_sh_mask.h19692 #define CP_HQD_IQ_TIMER__PROCESS_IQ_EN_MASK … macro
H A Dgc_10_3_0_sh_mask.h18538 #define CP_HQD_IQ_TIMER__PROCESS_IQ_EN_MASK … macro