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Searched refs:CP_HQD_IQ_TIMER__CLOCK_COUNT__SHIFT (Results 1 – 13 of 13) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h4006 #define CP_HQD_IQ_TIMER__CLOCK_COUNT__SHIFT 0xe macro
H A Dgfx_8_1_sh_mask.h4528 #define CP_HQD_IQ_TIMER__CLOCK_COUNT__SHIFT 0xe macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12949 #define CP_HQD_IQ_TIMER__CLOCK_COUNT__SHIFT … macro
H A Dgc_9_1_sh_mask.h14249 #define CP_HQD_IQ_TIMER__CLOCK_COUNT__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h14114 #define CP_HQD_IQ_TIMER__CLOCK_COUNT__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h16483 #define CP_HQD_IQ_TIMER__CLOCK_COUNT__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h4047 #define CP_HQD_IQ_TIMER__CLOCK_COUNT__SHIFT … macro
H A Dgc_11_5_0_sh_mask.h14122 #define CP_HQD_IQ_TIMER__CLOCK_COUNT__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h17428 #define CP_HQD_IQ_TIMER__CLOCK_COUNT__SHIFT … macro
H A Dgc_12_0_0_sh_mask.h13326 #define CP_HQD_IQ_TIMER__CLOCK_COUNT__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h20362 #define CP_HQD_IQ_TIMER__CLOCK_COUNT__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h19669 #define CP_HQD_IQ_TIMER__CLOCK_COUNT__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h18515 #define CP_HQD_IQ_TIMER__CLOCK_COUNT__SHIFT … macro