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Searched refs:CP_HQD_IQ_TIMER__CLOCK_COUNT_MASK (Results 1 – 13 of 13) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h4005 #define CP_HQD_IQ_TIMER__CLOCK_COUNT_MASK 0xc000 macro
H A Dgfx_8_1_sh_mask.h4527 #define CP_HQD_IQ_TIMER__CLOCK_COUNT_MASK 0xc000 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12963 #define CP_HQD_IQ_TIMER__CLOCK_COUNT_MASK … macro
H A Dgc_9_1_sh_mask.h14263 #define CP_HQD_IQ_TIMER__CLOCK_COUNT_MASK … macro
H A Dgc_9_2_1_sh_mask.h14128 #define CP_HQD_IQ_TIMER__CLOCK_COUNT_MASK … macro
H A Dgc_9_4_3_sh_mask.h16497 #define CP_HQD_IQ_TIMER__CLOCK_COUNT_MASK … macro
H A Dgc_9_4_2_sh_mask.h4061 #define CP_HQD_IQ_TIMER__CLOCK_COUNT_MASK … macro
H A Dgc_11_5_0_sh_mask.h14137 #define CP_HQD_IQ_TIMER__CLOCK_COUNT_MASK … macro
H A Dgc_11_0_0_sh_mask.h17443 #define CP_HQD_IQ_TIMER__CLOCK_COUNT_MASK … macro
H A Dgc_12_0_0_sh_mask.h13340 #define CP_HQD_IQ_TIMER__CLOCK_COUNT_MASK … macro
H A Dgc_10_1_0_sh_mask.h20377 #define CP_HQD_IQ_TIMER__CLOCK_COUNT_MASK … macro
H A Dgc_11_0_3_sh_mask.h19684 #define CP_HQD_IQ_TIMER__CLOCK_COUNT_MASK … macro
H A Dgc_10_3_0_sh_mask.h18530 #define CP_HQD_IQ_TIMER__CLOCK_COUNT_MASK … macro