Home
last modified time | relevance | path

Searched refs:CP_HQD_IQ_TIMER__CACHE_POLICY_MASK (Results 1 – 14 of 14) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h3391 #define CP_HQD_IQ_TIMER__CACHE_POLICY_MASK 0x3000000 macro
H A Dgfx_8_0_sh_mask.h4013 #define CP_HQD_IQ_TIMER__CACHE_POLICY_MASK 0x1000000 macro
H A Dgfx_8_1_sh_mask.h4535 #define CP_HQD_IQ_TIMER__CACHE_POLICY_MASK 0x1000000 macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12967 #define CP_HQD_IQ_TIMER__CACHE_POLICY_MASK … macro
H A Dgc_9_1_sh_mask.h14267 #define CP_HQD_IQ_TIMER__CACHE_POLICY_MASK … macro
H A Dgc_9_2_1_sh_mask.h14132 #define CP_HQD_IQ_TIMER__CACHE_POLICY_MASK … macro
H A Dgc_9_4_3_sh_mask.h16501 #define CP_HQD_IQ_TIMER__CACHE_POLICY_MASK … macro
H A Dgc_9_4_2_sh_mask.h4065 #define CP_HQD_IQ_TIMER__CACHE_POLICY_MASK … macro
H A Dgc_11_5_0_sh_mask.h14141 #define CP_HQD_IQ_TIMER__CACHE_POLICY_MASK … macro
H A Dgc_11_0_0_sh_mask.h17447 #define CP_HQD_IQ_TIMER__CACHE_POLICY_MASK … macro
H A Dgc_12_0_0_sh_mask.h13344 #define CP_HQD_IQ_TIMER__CACHE_POLICY_MASK … macro
H A Dgc_10_1_0_sh_mask.h20381 #define CP_HQD_IQ_TIMER__CACHE_POLICY_MASK … macro
H A Dgc_11_0_3_sh_mask.h19688 #define CP_HQD_IQ_TIMER__CACHE_POLICY_MASK … macro
H A Dgc_10_3_0_sh_mask.h18534 #define CP_HQD_IQ_TIMER__CACHE_POLICY_MASK … macro